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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 | // SPDX-License-Identifier: GPL-2.0 /* * Copyright 2008 Extreme Engineering Solutions, Inc. */ /* * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM, * and 4 programmable non-volatile GPIO pins. */ #include <i2c.h> #include <command.h> #include <linux/delay.h> #include "ds4510.h" enum { DS4510_CMD_INFO, DS4510_CMD_DEVICE, DS4510_CMD_NV, DS4510_CMD_RSTDELAY, DS4510_CMD_OUTPUT, DS4510_CMD_INPUT, DS4510_CMD_PULLUP, DS4510_CMD_EEPROM, DS4510_CMD_SEEPROM, DS4510_CMD_SRAM, }; /* * Write to DS4510, taking page boundaries into account */ static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count) { int wrlen; int i = 0; do { wrlen = DS4510_EEPROM_PAGE_SIZE - DS4510_EEPROM_PAGE_OFFSET(offset); if (count < wrlen) wrlen = count; if (i2c_write(chip, offset, 1, &buf[i], wrlen)) return -1; /* * This delay isn't needed for SRAM writes but shouldn't delay * things too much, so do it unconditionally for simplicity */ udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000); count -= wrlen; offset += wrlen; i += wrlen; } while (count > 0); return 0; } /* * General read from DS4510 */ static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count) { return i2c_read(chip, offset, 1, buf, count); } /* * Write SEE bit in config register. * nv = 0 - Writes to SEEPROM registers behave like EEPROM * nv = 1 - Writes to SEEPROM registers behave like SRAM */ static int ds4510_see_write(uint8_t chip, uint8_t nv) { uint8_t data; if (i2c_read(chip, DS4510_CFG, 1, &data, 1)) return -1; if (nv) /* Treat SEEPROM bits as EEPROM */ data &= ~DS4510_CFG_SEE; else /* Treat SEEPROM bits as SRAM */ data |= DS4510_CFG_SEE; return ds4510_mem_write(chip, DS4510_CFG, &data, 1); } /* * Write de-assertion of reset signal delay */ static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay) { uint8_t data; if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1)) return -1; data &= ~DS4510_RSTDELAY_MASK; data |= delay & DS4510_RSTDELAY_MASK; return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1); } /* * Write pullup characteristics of IO pins */ static int ds4510_pullup_write(uint8_t chip, uint8_t val) { val &= DS4510_IO_MASK; return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1); } /* * Read pullup characteristics of IO pins */ static int ds4510_pullup_read(uint8_t chip) { uint8_t val; if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1)) return -1; return val & DS4510_IO_MASK; } /* * Write drive level of IO pins */ static int ds4510_gpio_write(uint8_t chip, uint8_t val) { uint8_t data; int i; for (i = 0; i < DS4510_NUM_IO; i++) { if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1)) return -1; if (val & (0x1 << i)) data |= 0x1; else data &= ~0x1; if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1)) return -1; } return 0; } /* * Read drive level of IO pins */ static int ds4510_gpio_read(uint8_t chip) { uint8_t data; int val = 0; int i; for (i = 0; i < DS4510_NUM_IO; i++) { if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1)) return -1; if (data & 1) val |= (1 << i); } return val; } /* * Read physical level of IO pins */ static int ds4510_gpio_read_val(uint8_t chip) { uint8_t val; if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1)) return -1; return val & DS4510_IO_MASK; } /* * Display DS4510 information */ static int ds4510_info(uint8_t chip) { int i; int tmp; uint8_t data; printf("DS4510 @ 0x%x:\n\n", chip); if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1)) return -1; printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK); if (i2c_read(chip, DS4510_CFG, 1, &data, 1)) return -1; printf("config = 0x%x\n", data); printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0); printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0); printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0); printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0); printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0); printf("gpio pins: 3210\n"); printf("---------------\n"); printf("pullup "); tmp = ds4510_pullup_read(chip); if (tmp == -1) return tmp; for (i = DS4510_NUM_IO - 1; i >= 0; i--) printf("%d", (tmp & (1 << i)) ? 1 : 0); printf("\n"); printf("driven "); tmp = ds4510_gpio_read(chip); if (tmp == -1) return -1; for (i = DS4510_NUM_IO - 1; i >= 0; i--) printf("%d", (tmp & (1 << i)) ? 1 : 0); printf("\n"); printf("read "); tmp = ds4510_gpio_read_val(chip); if (tmp == -1) return -1; for (i = DS4510_NUM_IO - 1; i >= 0; i--) printf("%d", (tmp & (1 << i)) ? 1 : 0); printf("\n"); return 0; } struct cmd_tbl cmd_ds4510[] = { U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""), U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""), U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""), U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""), U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""), U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""), U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""), U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""), U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""), U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""), }; int do_ds4510(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { static uint8_t chip = 0x51; struct cmd_tbl *c; ulong ul_arg2 = 0; ulong ul_arg3 = 0; int tmp; ulong addr; ulong off; ulong cnt; int end; int (*rw_func)(uint8_t, int, uint8_t *, int); c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510)); /* All commands but "device" require 'maxargs' arguments */ if (!c || !((argc == (c->maxargs)) || (((int)c->cmd == DS4510_CMD_DEVICE) && (argc == (c->maxargs - 1))))) { return cmd_usage(cmdtp); } /* arg2 used as chip addr and pin number */ if (argc > 2) ul_arg2 = hextoul(argv[2], NULL); /* arg3 used as output/pullup value */ if (argc > 3) ul_arg3 = hextoul(argv[3], NULL); switch ((int)c->cmd) { case DS4510_CMD_DEVICE: if (argc == 3) chip = ul_arg2; printf("Current device address: 0x%x\n", chip); return 0; case DS4510_CMD_NV: return ds4510_see_write(chip, ul_arg2); case DS4510_CMD_OUTPUT: tmp = ds4510_gpio_read(chip); if (tmp == -1) return -1; if (ul_arg3) tmp |= (1 << ul_arg2); else tmp &= ~(1 << ul_arg2); return ds4510_gpio_write(chip, tmp); case DS4510_CMD_INPUT: tmp = ds4510_gpio_read_val(chip); if (tmp == -1) return -1; return (tmp & (1 << ul_arg2)) != 0; case DS4510_CMD_PULLUP: tmp = ds4510_pullup_read(chip); if (tmp == -1) return -1; if (ul_arg3) tmp |= (1 << ul_arg2); else tmp &= ~(1 << ul_arg2); return ds4510_pullup_write(chip, tmp); case DS4510_CMD_INFO: return ds4510_info(chip); case DS4510_CMD_RSTDELAY: return ds4510_rstdelay_write(chip, ul_arg2); case DS4510_CMD_EEPROM: end = DS4510_EEPROM + DS4510_EEPROM_SIZE; off = DS4510_EEPROM; break; case DS4510_CMD_SEEPROM: end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE; off = DS4510_SEEPROM; break; case DS4510_CMD_SRAM: end = DS4510_SRAM + DS4510_SRAM_SIZE; off = DS4510_SRAM; break; default: /* We should never get here... */ return 1; } /* Only eeprom, seeprom, and sram commands should make it here */ if (strcmp(argv[2], "read") == 0) rw_func = ds4510_mem_read; else if (strcmp(argv[2], "write") == 0) rw_func = ds4510_mem_write; else return cmd_usage(cmdtp); addr = hextoul(argv[3], NULL); off += hextoul(argv[4], NULL); cnt = hextoul(argv[5], NULL); if ((off + cnt) > end) { printf("ERROR: invalid len\n"); return -1; } return rw_func(chip, off, (uint8_t *)addr, cnt); } U_BOOT_CMD( ds4510, 6, 1, do_ds4510, "ds4510 eeprom/seeprom/sram/gpio access", "device [dev]\n" " - show or set current device address\n" "ds4510 info\n" " - display ds4510 info\n" "ds4510 output pin 0|1\n" " - set pin low or high-Z\n" "ds4510 input pin\n" " - read value of pin\n" "ds4510 pullup pin 0|1\n" " - disable/enable pullup on specified pin\n" "ds4510 nv 0|1\n" " - make gpio and seeprom writes volatile/non-volatile" "\n" "ds4510 rstdelay 0-3\n" " - set reset output delay" "\n" "ds4510 eeprom read addr off cnt\n" "ds4510 eeprom write addr off cnt\n" " - read/write 'cnt' bytes at EEPROM offset 'off'\n" "ds4510 seeprom read addr off cnt\n" "ds4510 seeprom write addr off cnt\n" " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n" "ds4510 sram read addr off cnt\n" "ds4510 sram write addr off cnt\n" " - read/write 'cnt' bytes at SRAM offset 'off'" ); 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