U-Boot

Defined in 22 files as a label:

• arch/arm/dts/socfpga.dtsi, line 615 (as a label)
• arch/arm/dts/socfpga_agilex.dtsi, line 220 (as a label)
• arch/arm/dts/socfpga_agilex5.dtsi, line 214 (as a label)
• arch/arm/dts/socfpga_arria10.dtsi, line 510 (as a label)
• arch/arm/dts/socfpga_stratix10.dtsi, line 155 (as a label)
• arch/riscv/dts/cv18xx.dtsi, line 101 (as a label)
• arch/riscv/dts/th1520.dtsi, line 256 (as a label)
• dts/upstream/src/arm/cirrus/ep7209.dtsi, line 65 (as a label)
• dts/upstream/src/arm/intel/socfpga/socfpga.dtsi, line 637 (as a label)
• dts/upstream/src/arm/intel/socfpga/socfpga_arria10.dtsi, line 516 (as a label)
• dts/upstream/src/arm/synaptics/berlin2.dtsi, line 208 (as a label)
• dts/upstream/src/arm/synaptics/berlin2cd.dtsi, line 198 (as a label)
• dts/upstream/src/arm/synaptics/berlin2q.dtsi, line 269 (as a label)
• dts/upstream/src/arm64/altera/socfpga_stratix10.dtsi, line 253 (as a label)
• dts/upstream/src/arm64/amd/elba.dtsi, line 126 (as a label)
• dts/upstream/src/arm64/bitmain/bm1880-sophon-edge.dts, line 92 (as a label)
• dts/upstream/src/arm64/bitmain/bm1880.dtsi, line 144 (as a label)
• dts/upstream/src/arm64/hisilicon/hip05.dtsi, line 361 (as a label)
• dts/upstream/src/arm64/intel/socfpga_agilex.dtsi, line 251 (as a label)
• dts/upstream/src/arm64/intel/socfpga_agilex5.dtsi, line 253 (as a label)
• dts/upstream/src/arm64/synaptics/berlin4ct.dtsi, line 159 (as a label)
• dts/upstream/src/riscv/sophgo/cv18xx.dtsi, line 88 (as a label)

Referenced in 45 files:

• arch/arm/dts/socfpga_agilex-u-boot.dtsi, line 64
• arch/arm/dts/socfpga_agilex5-u-boot.dtsi, line 46
• arch/arm/dts/socfpga_agilex5_socdk.dts
  • line 20
  • line 25
  • line 30
• arch/arm/dts/socfpga_agilex_socdk.dts
  • line 25
  • line 30
  • line 35
• arch/arm/dts/socfpga_arria10-u-boot.dtsi, line 124
• arch/arm/dts/socfpga_arria10_socdk.dtsi, line 109
• arch/arm/dts/socfpga_arria5_secu1.dts, line 111
• arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi, line 48
• arch/arm/dts/socfpga_arria5_socdk.dts, line 39
• arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts, line 51
• arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi, line 38
• arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts, line 38
• arch/arm/dts/socfpga_cyclone5_de10_nano.dts, line 62
• arch/arm/dts/socfpga_cyclone5_de10_standard.dts, line 62
• arch/arm/dts/socfpga_cyclone5_de1_soc.dts, line 60
• arch/arm/dts/socfpga_cyclone5_is1.dts, line 78
• arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi, line 28
• arch/arm/dts/socfpga_cyclone5_mcvevk.dts, line 58
• arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi, line 64
• arch/arm/dts/socfpga_cyclone5_socdk.dts
  • line 34
  • line 39
  • line 44
  • line 49
  • line 115
• arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi, line 48
• arch/arm/dts/socfpga_cyclone5_sockit.dts
  • line 35
  • line 41
  • line 47
  • line 53
• arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi, line 52
• arch/arm/dts/socfpga_cyclone5_socrates.dts
  • line 64
  • line 69
• arch/arm/dts/socfpga_cyclone5_sr1500.dts, line 54
• arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi, line 48
• arch/arm/dts/socfpga_cyclone5_vining_fpga.dts, line 61
• arch/arm/dts/socfpga_n5x-u-boot.dtsi, line 105
• arch/arm/dts/socfpga_stratix10_socdk.dts
  • line 25
  • line 30
  • line 35
• dts/upstream/src/arm/cirrus/ep7209.dtsi, line 17
• dts/upstream/src/arm/intel/socfpga/socfpga_arria10_socdk.dtsi, line 109
• dts/upstream/src/arm/intel/socfpga/socfpga_arria5_socdk.dts, line 39
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_chameleon96.dts, line 57
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_de0_nano_soc.dts, line 38
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_mcvevk.dts, line 56
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_socdk.dts
  • line 34
  • line 39
  • line 44
  • line 49
  • line 115
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_sockit.dts
  • line 35
  • line 41
  • line 47
  • line 53
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_socrates.dts
  • line 64
  • line 69
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_sodia.dts
  • line 41
  • line 46
  • line 51
  • line 56
  • line 103
• dts/upstream/src/arm/intel/socfpga/socfpga_cyclone5_vining_fpga.dts, line 73
• dts/upstream/src/arm/synaptics/berlin2q-marvell-dmp.dts
  • line 35
  • line 44
  • line 53
  • line 64
  • line 74
• dts/upstream/src/arm64/altera/socfpga_stratix10_socdk.dts
  • line 27
  • line 32
  • line 37
  • line 154
  • line 155
• dts/upstream/src/arm64/altera/socfpga_stratix10_socdk_nand.dts
  • line 27
  • line 32
  • line 37
• dts/upstream/src/arm64/intel/socfpga_agilex_socdk.dts
  • line 26
  • line 31
  • line 36
• dts/upstream/src/arm64/intel/socfpga_agilex_socdk_nand.dts
  • line 26
  • line 31
  • line 36