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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 | // SPDX-License-Identifier: GPL-2.0+ /** * (C) Copyright 2014, Cavium Inc. * (C) Copyright 2017, Xilinx Inc. * **/ #include <asm-offsets.h> #include <config.h> #include <asm/cache.h> #include <asm/macro.h> #include <asm/psci.h> #include <asm/ptrace.h> #include <asm/system.h> /* * Issue the hypervisor call * * x0~x7: input arguments * x0~x3: output arguments */ static void hvc_call(struct pt_regs *args) { asm volatile( "ldr x0, %0\n" "ldr x1, %1\n" "ldr x2, %2\n" "ldr x3, %3\n" "ldr x4, %4\n" "ldr x5, %5\n" "ldr x6, %6\n" "hvc #0\n" "str x0, %0\n" "str x1, %1\n" "str x2, %2\n" "str x3, %3\n" : "+m" (args->regs[0]), "+m" (args->regs[1]), "+m" (args->regs[2]), "+m" (args->regs[3]) : "m" (args->regs[4]), "m" (args->regs[5]), "m" (args->regs[6]) : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17"); } /* * void smc_call(arg0, arg1...arg7) * * issue the secure monitor call * * x0~x7: input arguments * x0~x3: output arguments */ void smc_call(struct pt_regs *args) { asm volatile( "ldr x0, %0\n" "ldr x1, %1\n" "ldr x2, %2\n" "ldr x3, %3\n" "ldr x4, %4\n" "ldr x5, %5\n" "ldr x6, %6\n" "smc #0\n" "str x0, %0\n" "str x1, %1\n" "str x2, %2\n" "str x3, %3\n" : "+m" (args->regs[0]), "+m" (args->regs[1]), "+m" (args->regs[2]), "+m" (args->regs[3]) : "m" (args->regs[4]), "m" (args->regs[5]), "m" (args->regs[6]) : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17"); } /* * For now, all systems we support run at least in EL2 and thus * trigger PSCI calls to EL3 using SMC. If anyone ever wants to * use PSCI on U-Boot running below a hypervisor, please detect * this and set the flag accordingly. */ static const bool use_smc_for_psci = true; void __noreturn psci_system_reset(void) { struct pt_regs regs; regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET; if (use_smc_for_psci) smc_call(®s); else hvc_call(®s); while (1) ; } void __noreturn psci_system_reset2(u32 reset_level, u32 cookie) { struct pt_regs regs; regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2; regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level; regs.regs[2] = cookie; if (use_smc_for_psci) smc_call(®s); else hvc_call(®s); while (1) ; } void __noreturn psci_system_off(void) { struct pt_regs regs; regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_OFF; if (use_smc_for_psci) smc_call(®s); else hvc_call(®s); while (1) ; } |