Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 | if ARCH_ROCKCHIP config ROCKCHIP_PX30 bool "Support Rockchip PX30" select ARM64 imply OF_UPSTREAM select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select TPL_TINY_FRAMEWORK if TPL select TPL_HAVE_INIT_STACK if TPL imply SPL_SEPARATE_BSS imply SPL_SERIAL imply TPL_SERIAL imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_LIBGENERIC_SUPPORT imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN help The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK3036 bool "Support Rockchip RK3036" select CPU_V7A select SUPPORT_SPL select SPL imply OF_UPSTREAM imply USB_FUNCTION_ROCKUSB imply CMD_ROCKUSB imply ROCKCHIP_COMMON_BOARD help The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK3066 bool "Support Rockchip RK3066" select CPU_V7A select SPL_BOARD_INIT if SPL select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select TPL_ROCKCHIP_BACK_TO_BROM select TPL_ROCKCHIP_EARLYRETURN_TO_BROM imply OF_UPSTREAM imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SERIAL imply TPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL help The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two video interfaces, several memory options and video codec support. Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK3128 bool "Support Rockchip RK3128" select CPU_V7A imply ROCKCHIP_COMMON_BOARD help The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK3188 bool "Support Rockchip RK3188" select CPU_V7A select SPL_BOARD_INIT if SPL select SUPPORT_SPL select SPL select SPL_CLK select SPL_REGMAP select SPL_SYSCON select SPL_RAM select SPL_DRIVERS_MISC select SPL_ROCKCHIP_EARLYRETURN_TO_BROM select SPL_ROCKCHIP_BACK_TO_BROM select BOARD_LATE_INIT imply OF_UPSTREAM imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD help The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two video interfaces, several memory options and video codec support. Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK322X bool "Support Rockchip RK3228/RK3229" select CPU_V7A select SUPPORT_SPL select SUPPORT_TPL select SPL select SPL_DM select SPL_OF_LIBFDT select TPL select TPL_DM select TPL_OF_LIBFDT select TPL_HAVE_INIT_STACK if TPL select SPL_DRIVERS_MISC imply ROCKCHIP_COMMON_BOARD imply SPL_SERIAL imply SPL_ROCKCHIP_COMMON_BOARD select SPL_OPTEE_IMAGE if SPL_FIT imply TPL_SERIAL imply TPL_ROCKCHIP_COMMON_BOARD select TPL_LIBCOMMON_SUPPORT select TPL_LIBGENERIC_SUPPORT help The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK3288 bool "Support Rockchip RK3288" select CPU_V7A select OF_SYSTEM_SETUP select SKIP_LOWLEVEL_INIT_ONLY select SUPPORT_SPL select SPL select SUPPORT_TPL select FDT_64BIT imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_CLK imply TPL_DM imply TPL_DRIVERS_MISC imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT imply TPL_HAVE_INIT_STACK imply TPL_OF_CONTROL imply TPL_OF_PLATDATA imply TPL_RAM imply TPL_REGMAP imply TPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL imply TPL_SYSCON imply USB_FUNCTION_ROCKUSB imply CMD_ROCKUSB help The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK3308 bool "Support Rockchip RK3308" select ARM64 select SUPPORT_SPL select SUPPORT_TPL select SPL select SPL_ATF select SPL_ATF_NO_PLATFORM_PARAM select SPL_LOAD_FIT imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN imply DM_RNG imply LEGACY_IMAGE_FORMAT imply MISC imply MISC_INIT_R imply OF_LIBFDT_OVERLAY imply OF_UPSTREAM imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply ROCKCHIP_EXTERNAL_TPL imply ROCKCHIP_OTP imply SPL_CLK imply SPL_DM_SEQ_ALIAS imply SPL_FIT_SIGNATURE imply SPL_PINCTRL imply SPL_RAM imply SPL_REGMAP imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SEPARATE_BSS imply SPL_SERIAL imply SPL_SYSCON help The Rockchip RK3308 is a ARM-based Soc which embedded with quad Cortex-A35 and highly integrated audio interfaces. config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 select SUPPORT_SPL select SPL select SUPPORT_TPL select TPL_HAVE_INIT_STACK if TPL imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN imply MISC imply MISC_INIT_R imply OF_LIBFDT_OVERLAY imply OF_LIVE imply OF_UPSTREAM imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply ROCKCHIP_EFUSE imply ROCKCHIP_SDRAM_COMMON imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SEPARATE_BSS imply SPL_SERIAL imply TPL if !ROCKCHIP_EXTERNAL_TPL imply TPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL help The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK3368 bool "Support Rockchip RK3368" select ARM64 select SUPPORT_SPL select SUPPORT_TPL select TPL_HAVE_INIT_STACK if TPL imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SEPARATE_BSS imply SPL_SERIAL imply TPL_SERIAL imply TPL_ROCKCHIP_COMMON_BOARD help The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised into a big and little cluster with 4 cores each) Cortex-A53 including AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache (for the little cluster), PowerVR G6110 based graphics, one video output processor supporting LVDS/HDMI/eDP, several DDR3 options and video codec support. On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK3399 bool "Support Rockchip RK3399" select ARM64 select SUPPORT_SPL select SUPPORT_TPL select SUPPORT_VPL select SPL select SPL_ATF select SPL_BOARD_INIT if SPL select SPL_LOAD_FIT select SPL_CLK if SPL && !VPL select SPL_PINCTRL if SPL select SPL_RAM if SPL select SPL_REGMAP if SPL select SPL_SYSCON if SPL select TPL_HAVE_INIT_STACK if TPL select VPL_HAVE_INIT_STACK if VPL select CLK select FIT select PINCTRL select RAM select REGMAP select SYSCON select DM_PMIC select DM_REGULATOR_FIXED select BOARD_LATE_INIT imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN imply BOOTSTD_FULL imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT imply DM_RNG imply LEGACY_IMAGE_FORMAT imply MISC imply MISC_INIT_R imply OF_LIBFDT_OVERLAY imply OF_LIVE imply OF_UPSTREAM imply PARTITION_TYPE_GUID imply PHY_GIGE if GMAC_ROCKCHIP imply PRE_CONSOLE_BUFFER imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply ROCKCHIP_EFUSE imply ROCKCHIP_SDRAM_COMMON imply SPL_DM_SEQ_ALIAS imply SPL_FIT_SIGNATURE imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SERIAL imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT imply TPL_CLK imply TPL_DM imply TPL_DM_MMC if VPL imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT imply TPL_OF_CONTROL imply TPL_RAM if !VPL imply TPL_REGMAP imply TPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL imply TPL_SYS_MALLOC_SIMPLE imply TPL_SYSCON imply TPL_TINY_MEMSET help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK3528 bool "Support Rockchip RK3528" select ARM64 select SUPPORT_SPL select SPL select CLK select PINCTRL select RAM select REGMAP select SYSCON select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN imply BOOTSTD_FULL imply DM_RNG imply FIT imply LEGACY_IMAGE_FORMAT imply MISC imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY imply OF_LIVE imply OF_UPSTREAM imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply ROCKCHIP_EXTERNAL_TPL imply ROCKCHIP_OTP imply SPL_ATF imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_CLK imply SPL_DM_SEQ_ALIAS imply SPL_FIT_SIGNATURE imply SPL_LOAD_FIT imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT imply SPL_OF_CONTROL imply SPL_PINCTRL imply SPL_RAM imply SPL_REGMAP imply SPL_SERIAL imply SPL_SYSCON imply ENV_RELOC_GD_ENV_ADDR imply SYSRESET imply SYSRESET_PSCI if SPL_ATF help The Rockchip RK3528 is a ARM-based SoC with a quad-core Cortex-A53. config ROCKCHIP_RK3568 bool "Support Rockchip RK3568" select ARM64 select SUPPORT_SPL select SPL select CLK select PINCTRL select RAM select REGMAP select SYSCON select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET imply BOOTSTD_FULL imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY imply OF_UPSTREAM imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply ROCKCHIP_EXTERNAL_TPL imply ROCKCHIP_OTP imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55, including NEON and GPU, 512K L3 cache, Mali-G52 based graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK3576 bool "Support Rockchip RK3576" select ARM64 select SUPPORT_SPL select SPL select CLK select PINCTRL select RAM select REGMAP select SYSCON select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN imply BOOTSTD_FULL imply DM_RNG imply FIT imply LEGACY_IMAGE_FORMAT imply MISC imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY imply OF_LIVE imply OF_UPSTREAM imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply ROCKCHIP_EXTERNAL_TPL imply ROCKCHIP_OTP imply SPL_ATF imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_CLK imply SPL_DM_SEQ_ALIAS imply SPL_FIT_SIGNATURE imply SPL_LOAD_FIT imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT imply SPL_OF_CONTROL imply SPL_PINCTRL imply SPL_RAM imply SPL_REGMAP imply SPL_SERIAL imply SPL_SYSCON imply ENV_RELOC_GD_ENV_ADDR imply SYSRESET help The Rockchip RK3576 is a ARM-based SoC with quad-core Cortex-A72 and and quad-core Cortex-A53. config ROCKCHIP_RK3588 bool "Support Rockchip RK3588" select ARM64 select SUPPORT_SPL select SPL select CLK select PINCTRL select RAM select REGMAP select SYSCON select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET imply BOOTSTD_FULL imply CLK_SCMI imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY imply OF_UPSTREAM imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_COMMON_STACK_ADDR imply ROCKCHIP_EXTERNAL_TPL imply ROCKCHIP_OTP imply SCMI_FIRMWARE imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4, HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0, PCIe 3.0, SATA 3, Ethernet, SDIO3.0 I2C, UART, SPI, GPIO and PWM. config ROCKCHIP_RV1108 bool "Support Rockchip RV1108" select CPU_V7A imply ROCKCHIP_COMMON_BOARD imply OF_UPSTREAM help The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 and a DSP. config ROCKCHIP_RV1126 bool "Support Rockchip RV1126" select CPU_V7A select SKIP_LOWLEVEL_INIT_ONLY select TPL select SUPPORT_TPL select TPL_HAVE_INIT_STACK select TPL_ROCKCHIP_BACK_TO_BROM select SPL select SUPPORT_SPL select SPL_STACK_R select CLK select FIT select PINCTRL select RAM select ROCKCHIP_SDRAM_COMMON select REGMAP select SYSCON select DM_PMIC select DM_REGULATOR_FIXED select DM_RESET select REGULATOR_RK8XX select PMIC_RK8XX select BOARD_LATE_INIT imply ROCKCHIP_COMMON_BOARD select SPL_OPTEE_IMAGE if SPL_FIT imply OF_LIBFDT_OVERLAY imply ROCKCHIP_OTP imply MISC_INIT_R imply TPL_DM imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT imply TPL_OF_CONTROL imply TPL_OF_PLATDATA imply TPL_RAM imply TPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL imply SPL_CLK imply SPL_DM imply SPL_DRIVERS_MISC imply SPL_LIBCOMMON_SUPPORT imply SPL_LIBGENERIC_SUPPORT imply SPL_OF_CONTROL imply SPL_RAM imply SPL_REGMAP imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SERIAL imply SPL_SYSCON imply OF_UPSTREAM config ROCKCHIP_USB_UART bool "Route uart output to usb pins" help Rockchip SoCs have the ability to route the signals of the debug uart through the d+ and d- pins of a specific usb phy to enable some form of closed-case debugging. With this option supported SoCs will enable this routing as a debug measure. config SPL_ROCKCHIP_BACK_TO_BROM bool "SPL returns to bootrom" default y if ROCKCHIP_RK3036 select ROCKCHIP_BROM_HELPER select SPL_BOOTROM_SUPPORT depends on SPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. config TPL_ROCKCHIP_BACK_TO_BROM bool "TPL returns to bootrom" default y if !VPL select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066 select TPL_BOOTROM_SUPPORT depends on TPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. config ROCKCHIP_COMMON_BOARD bool "Rockchip common board file" help Rockchip SoCs have similar boot process, Common board file is mainly in charge of common process of board_init() and board_late_init() for U-Boot proper. config SPL_ROCKCHIP_COMMON_BOARD bool "Rockchip SPL common board file" depends on SPL help Rockchip SoCs have similar boot process, SPL is mainly in charge of load and boot Trust ATF/U-Boot firmware, and DRAM init if there is no TPL for the board. config TPL_ROCKCHIP_COMMON_BOARD bool "Rockchip TPL common board file" depends on TPL help Rockchip SoCs have similar boot process, prefer to use TPL for DRAM init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL common board is a basic TPL board init which can be shared for most of SoCs to avoid copy-paste for different SoCs. config VPL_ROCKCHIP_COMMON_BOARD bool "Rockchip VPL common board file" depends on VPL default y help Enable the VPL phase for rockchip, which selects which SPL/U-Boot will be used on each boot. With this flow, used by Verified Boot for Embedded (VBE), TPL is loaded by the boot ROM. Then TPL loads VPL, VPL loads SPL and SPL loads U-Boot. config ROCKCHIP_EXTERNAL_TPL bool "Use external TPL binary" help Some Rockchip SoCs require an external TPL to initialize DRAM. Enable this option and build with ROCKCHIP_TPL=/path/to/ddr.bin to include the external TPL in the image built by binman. config ROCKCHIP_BOOT_MODE_REG hex "Rockchip boot mode flag register address" help The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h) according to the value from this register. config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON bool "Disable device boot on power plug-in" depends on PMIC_RK8XX ---help--- Say Y here to prevent the device from booting up because of a plug-in event. When set, the device will boot briefly to determine why it was powered on, and if it was determined because of a plug-in event instead of a button press event it will shut back off. config ROCKCHIP_STIMER bool "Rockchip STIMER support" default y help Enable Rockchip STIMER support. config ROCKCHIP_STIMER_BASE hex depends on ROCKCHIP_STIMER config ROCKCHIP_SPL_RESERVE_IRAM hex "Size of IRAM reserved in SPL" default 0x0 help SPL may need reserve memory for firmware loaded by SPL, whose load address is in IRAM and may overlay with SPL text area if not reserved. config ROCKCHIP_BROM_HELPER bool config SPL_ROCKCHIP_EARLYRETURN_TO_BROM bool "SPL requires early-return (for RK3188-style BROM) to BROM" depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK help Some Rockchip BROM variants (e.g. on the RK3188) load the first stage in segments and enter multiple times. E.g. on the RK3188, the first 1KB of the first stage are loaded first and entered; after returning to the BROM, the remainder of the first stage is loaded, but the BROM re-enters at the same address/to the same code as previously. This enables support code in the BOOT0 hook for the SPL stage to allow multiple entries. config ROCKCHIP_DISABLE_FORCE_JTAG bool "Disable force_jtag feature" default y depends on SPL help Rockchip SoCs can automatically switch between jtag and sdmmc based on the following rules: - all the SDMMC pins including SDMMC_DET set as SDMMC function in GRF, - force_jtag bit in GRF is 1, - SDMMC_DET is low (no card detected), Some HW design may not route the SD card card detect to SDMMC_DET pin, thus breaking the SD card support in some cases because JTAG would be auto-enabled by mistake. Also, enabling JTAG at runtime may be an undesired feature, e.g. because it could be a security vulnerability. This disables force_jtag feature, which you may want for debugging purposes. If unsure, say Y. config TPL_ROCKCHIP_EARLYRETURN_TO_BROM bool "TPL requires early-return (for RK3188-style BROM) to BROM" depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK help Some Rockchip BROM variants (e.g. on the RK3188) load the first stage in segments and enter multiple times. E.g. on the RK3188, the first 1KB of the first stage are loaded first and entered; after returning to the BROM, the remainder of the first stage is loaded, but the BROM re-enters at the same address/to the same code as previously. This enables support code in the BOOT0 hook for the TPL stage to allow multiple entries. config SPL_MMC default y if !SPL_ROCKCHIP_BACK_TO_BROM config TPL_MMC default y if !TPL_ROCKCHIP_BACK_TO_BROM config ROCKCHIP_SPI_IMAGE bool "Build a SPI image for rockchip" help Some Rockchip SoCs support booting from SPI flash. Enable this option to produce a SPI-flash image containing U-Boot. The image is built by binman. U-Boot sits near the start of the image. config ROCKCHIP_MASKROM_IMAGE bool "Build a maskrom mode image for Rockchip" depends on TPL || ROCKCHIP_EXTERNAL_TPL select SPL_RAM_DEVICE help Rockchip SoCs support maskrom mode boot over USB. Enable this option to produce maskrom mode boot images containing U-Boot. config LNX_KRNL_IMG_TEXT_OFFSET_BASE default TEXT_BASE config ROCKCHIP_COMMON_STACK_ADDR bool depends on SPL_SHARES_INIT_SP_ADDR depends on TPL || ROCKCHIP_EXTERNAL_TPL select HAS_CUSTOM_SYS_INIT_SP_ADDR imply SPL_LIBCOMMON_SUPPORT if SPL imply SPL_LIBGENERIC_SUPPORT if SPL imply SPL_ROCKCHIP_COMMON_BOARD if SPL imply SPL_SYS_MALLOC_F if SPL imply SPL_SYS_MALLOC_SIMPLE if SPL imply TPL_LIBCOMMON_SUPPORT if TPL && TPL_ROCKCHIP_COMMON_BOARD imply TPL_LIBGENERIC_SUPPORT if TPL && TPL_ROCKCHIP_COMMON_BOARD imply TPL_SYS_MALLOC_F if TPL && TPL_ROCKCHIP_COMMON_BOARD imply TPL_SYS_MALLOC_SIMPLE if TPL && TPL_ROCKCHIP_COMMON_BOARD config NR_DRAM_BANKS default 10 if ROCKCHIP_EXTERNAL_TPL source "arch/arm/mach-rockchip/px30/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3066/Kconfig" source "arch/arm/mach-rockchip/rk3128/Kconfig" source "arch/arm/mach-rockchip/rk3188/Kconfig" source "arch/arm/mach-rockchip/rk322x/Kconfig" source "arch/arm/mach-rockchip/rk3288/Kconfig" source "arch/arm/mach-rockchip/rk3308/Kconfig" source "arch/arm/mach-rockchip/rk3328/Kconfig" source "arch/arm/mach-rockchip/rk3368/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" source "arch/arm/mach-rockchip/rk3528/Kconfig" source "arch/arm/mach-rockchip/rk3568/Kconfig" source "arch/arm/mach-rockchip/rk3576/Kconfig" source "arch/arm/mach-rockchip/rk3588/Kconfig" source "arch/arm/mach-rockchip/rv1108/Kconfig" source "arch/arm/mach-rockchip/rv1126/Kconfig" if ROCKCHIP_COMMON_STACK_ADDR && SPL_SHARES_INIT_SP_ADDR config CUSTOM_SYS_INIT_SP_ADDR default 0x63f00000 if SPL_TEXT_BASE = 0x60000000 default 0x43f00000 if SPL_TEXT_BASE = 0x40000000 default 0x03f00000 if SPL_TEXT_BASE = 0x00000000 config SYS_MALLOC_F_LEN default 0x10000 if CUSTOM_SYS_INIT_SP_ADDR = 0x63f00000 default 0x10000 if CUSTOM_SYS_INIT_SP_ADDR = 0x43f00000 default 0x10000 if CUSTOM_SYS_INIT_SP_ADDR = 0x03f00000 config SPL_SYS_MALLOC_F_LEN default 0x8000 if CUSTOM_SYS_INIT_SP_ADDR = 0x63f00000 default 0x8000 if CUSTOM_SYS_INIT_SP_ADDR = 0x43f00000 default 0x8000 if CUSTOM_SYS_INIT_SP_ADDR = 0x03f00000 config TPL_SYS_MALLOC_F_LEN default 0x0800 if CUSTOM_SYS_INIT_SP_ADDR = 0x63f00000 default 0x4000 if CUSTOM_SYS_INIT_SP_ADDR = 0x43f00000 default 0x4000 if CUSTOM_SYS_INIT_SP_ADDR = 0x03f00000 config TEXT_BASE default 0x60800000 if SPL_TEXT_BASE = 0x60000000 default 0x40800000 if SPL_TEXT_BASE = 0x40000000 default 0x00800000 if SPL_TEXT_BASE = 0x00000000 config SPL_TEXT_BASE default 0x60000000 if ROCKCHIP_RK3036 || ROCKCHIP_RK3066 || \ ROCKCHIP_RK3128 || ROCKCHIP_RK3188 || \ ROCKCHIP_RK322X || ROCKCHIP_RV1108 default 0x40000000 if ROCKCHIP_RK3576 default 0x00000000 config SPL_HAS_BSS_LINKER_SECTION default y if ARM64 config SPL_BSS_START_ADDR default 0x63f80000 if SPL_TEXT_BASE = 0x60000000 default 0x43f80000 if SPL_TEXT_BASE = 0x40000000 default 0x03f80000 if SPL_TEXT_BASE = 0x00000000 config SPL_BSS_MAX_SIZE default 0x8000 if SPL_BSS_START_ADDR = 0x63f80000 default 0x8000 if SPL_BSS_START_ADDR = 0x43f80000 default 0x8000 if SPL_BSS_START_ADDR = 0x03f80000 config SPL_STACK_R default y if CUSTOM_SYS_INIT_SP_ADDR = 0x63f00000 default y if CUSTOM_SYS_INIT_SP_ADDR = 0x43f00000 default y if CUSTOM_SYS_INIT_SP_ADDR = 0x03f00000 config SPL_STACK_R_ADDR default 0x63e00000 if CUSTOM_SYS_INIT_SP_ADDR = 0x63f00000 default 0x43e00000 if CUSTOM_SYS_INIT_SP_ADDR = 0x43f00000 default 0x03e00000 if CUSTOM_SYS_INIT_SP_ADDR = 0x03f00000 config SPL_STACK_R_MALLOC_SIMPLE_LEN default 0x200000 if SPL_STACK_R_ADDR = 0x63e00000 default 0x200000 if SPL_STACK_R_ADDR = 0x43e00000 default 0x200000 if SPL_STACK_R_ADDR = 0x03e00000 endif endif |