Open Menu / arch / riscv / dts / starfive-visionfive2-u-boot.dtsi
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// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
 * Copyright (C) 2022 StarFive Technology Co., Ltd.
 */

/ {
	timer {
		compatible = "riscv,timer";
		interrupts-extended = <&cpu0_intc 5>,
				      <&cpu1_intc 5>,
				      <&cpu2_intc 5>,
				      <&cpu3_intc 5>,
				      <&cpu4_intc 5>;
	};

	soc {
		bootph-pre-ram;

		memory-controller@15700000 {
			clock-frequency = <2133>; /* FIXME: delete property and implement CCF */
		};
	};
};

&cpus {
	bootph-pre-ram;
};

&gmac0_rgmii_rxin {
	bootph-pre-ram;
};

&gmac0_rmii_refin {
	bootph-pre-ram;
};

&aoncrg {
	bootph-pre-ram;
};

&syscrg {
	assigned-clock-rates = <0>; /* cpufreq not implemented, use defaults */
};

&stgcrg {
	bootph-pre-ram;
};

&sys_syscon {
	bootph-pre-ram;
};

&pllclk {
	/delete-property/ bootph-pre-ram;
};