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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 | /* SPDX-License-Identifier: GPL-2.0+ */ /* * Based on acpi.c from coreboot * * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com> * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> */ #ifndef __ASM_ACPI_TABLE_H__ #define __ASM_ACPI_TABLE_H__ #ifndef __ACPI__ #include <pci.h> struct acpi_facs; struct acpi_fadt; struct acpi_global_nvs; struct acpi_madt_ioapic; struct acpi_madt_irqoverride; struct acpi_madt_lapic_nmi; struct acpi_mcfg_mmconfig; struct acpi_table_header; /* These can be used by the target port */ int acpi_create_madt_lapics(void *current); int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr, u32 gsi_base); int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride, u8 bus, u8 source, u32 gsirq, u16 flags); int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, u8 cpu, u16 flags, u8 lint); /** * acpi_write_hpet() - Write out a HPET table * * Write out the table for High-Precision Event Timers * * @ctx: Current ACPI context * Return: 0 if OK, -ve on error */ int acpi_write_hpet(struct acpi_ctx *ctx); /** * acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table * * @gnvs: Table to fill in * Return: 0 if OK, -ve on error */ int acpi_create_gnvs(struct acpi_global_nvs *gnvs); /** * arch_read_sci_irq_select() - Read the system-control interrupt number * * @returns value of IRQ register in the PMC */ int arch_read_sci_irq_select(void); /** * arch_write_sci_irq_select() - Set the system-control interrupt number * * @scis: New value for IRQ register in the PMC */ int arch_write_sci_irq_select(uint scis); /** * arch_madt_sci_irq_polarity() - Return the priority to use for the MADT * * @sci: System-control interrupt number * Return: priority to use (MP_IRQ_POLARITY_...) */ int arch_madt_sci_irq_polarity(int sci); /** * acpi_create_dmar_drhd() - Create a table for DMA remapping with the IOMMU * * See here for the specification * https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf * * @ctx: ACPI context pointer * @flags: (DRHD_INCLUDE_...) * @segment: PCI segment asscociated with this unit * @bar: Base address of remapping hardware register-set for this unit */ void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment, u64 bar); /** * acpi_create_dmar_rmrr() - Set up an RMRR * * This sets up a Reserved-Memory Region Reporting structure, used to allow * DMA to regions used by devices that the BIOS controls. * * @ctx: ACPI context pointer * @segment: PCI segment asscociated with this unit * @bar: Base address of mapping * @limit: End address of mapping */ void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar, u64 limit); /** * acpi_dmar_drhd_fixup() - Set the length of an DRHD * * This sets the DRHD length field based on the current ctx->current * * @ctx: ACPI context pointer * @base: Address of the start of the DRHD */ void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base); /** * acpi_dmar_rmrr_fixup() - Set the length of an RMRR * * This sets the RMRR length field based on the current ctx->current * * @ctx: ACPI context pointer * @base: Address of the start of the RMRR */ void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base); /** * acpi_create_dmar_ds_pci() - Set up a DMAR scope for a PCI device * * @ctx: ACPI context pointer * @bdf: PCI device to add * Return: length of mapping in bytes */ int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf); /** * acpi_create_dmar_ds_pci_br() - Set up a DMAR scope for a PCI bridge * * This is used to provide a mapping for a PCI bridge * * @ctx: ACPI context pointer * @bdf: PCI device to add * Return: length of mapping in bytes */ int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf); /** * acpi_create_dmar_ds_ioapic() - Set up a DMAR scope for an IOAPIC device * * @ctx: ACPI context pointer * @enumeration_id: Enumeration ID (typically 2) * @bdf: PCI device to add * Return: length of mapping in bytes */ int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id, pci_dev_t bdf); /** * acpi_create_dmar_ds_msi_hpet() - Set up a DMAR scope for an HPET * * Sets up a scope for a High-Precision Event Timer that supports * Message-Signalled Interrupts * * @ctx: ACPI context pointer * @enumeration_id: Enumeration ID (typically 0) * @bdf: PCI device to add * Return: length of mapping in bytes */ int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id, pci_dev_t bdf); /** * intel_acpi_fill_fadt() - Set up the contents of the FADT * * This sets up parts of the Fixed ACPI Description Table that are common to * Intel chips * * @fadt: Pointer to place to put FADT */ void intel_acpi_fill_fadt(struct acpi_fadt *fadt); #endif /* !__ACPI__ */ #endif /* __ASM_ACPI_TABLE_H__ */ |