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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 | // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2007-2008 * Stelian Pop <stelian@popies.net> * Lead Tech Design <www.leadtechdesign.com> * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at) * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> */ #include <config.h> #include <init.h> #include <video.h> #include <asm/global_data.h> #include <linux/sizes.h> #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/at91_matrix.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <asm/mach-types.h> DECLARE_GLOBAL_DATA_PTR; /* ------------------------------------------------------------------------- */ /* * Miscellaneous platform dependent initializations */ #ifdef CONFIG_CMD_NAND static void pm9263_nand_hw_init(void) { unsigned long csa; struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC0; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; /* Enable CS3 */ csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; writel(csa, &matrix->csa[0]); /* Configure SMC CS3 for NAND/SmartMedia */ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1), &smc->cs[3].setup); writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), &smc->cs[3].pulse); writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), &smc->cs[3].cycle); writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | AT91_SMC_MODE_EXNW_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_MODE_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_MODE_DBW_8 | #endif AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode); /* Configure RDY/BSY */ gpio_direction_input(CFG_SYS_NAND_READY_PIN); /* Enable NandFlash */ gpio_direction_output(CFG_SYS_NAND_ENABLE_PIN, 1); } #endif int board_early_init_f(void) { return 0; } int board_init(void) { /* arch number of PM9263 Board */ gd->bd->bi_arch_number = MACH_TYPE_PM9263; /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; #ifdef CONFIG_CMD_NAND pm9263_nand_hw_init(); #endif #ifdef CONFIG_USB_OHCI_NEW at91_uhp_hw_init(); #endif return 0; } int dram_init(void) { /* dram_init must store complete RAM size in gd->ram_size */ gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); return 0; } int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; return 0; } #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard (void) { ulong fb_base = video_get_fb(); char *ss; printf ("Board : Ronetix PM9263\n"); switch (fb_base) { case PHYS_PSRAM: ss = "(PSRAM)"; break; case ATMEL_BASE_SRAM0: ss = "(Internal SRAM)"; break; default: ss = ""; break; } printf("Video memory : 0x%08lX %s\n", fb_base, ss); printf ("\n"); return 0; } #endif |