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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 | // SPDX-License-Identifier: GPL-2.0+ /* * Copyright Siemens AG 2023 * * DDR signal integrity test * Check signals on DDR lines * - signals must be as fast as possible and generate long burst * - signals must be unidirectional (to DDR or from DDR only) * * Set pattern: define 2^n 32-bit patterns (up to 4) * Addresses: must be multiple of 16 to avoid checks in loops * Test functions * - write: write pattern to memory area for iteration times * - read: write pattern once to memory area, read for iteration times */ #include <command.h> #include <exports.h> #include <time.h> #if CONFIG_IS_ENABLED(AM33XX) #include <asm/arch-am33xx/hardware_am33xx.h> #include <asm/arch-am33xx/cpu.h> #include <asm/io.h> #endif /* enable some print for debugging */ #ifdef PR_DEBUG #define PDEBUG(fmt, args...) printf(fmt, ## args) #else #define PDEBUG(fmt, args...) #endif /* define 4 32-bit patterns */ #define MAX_PTN_SIZE (128) #define PTN_ARRAY_SIZE (MAX_PTN_SIZE / (8 * sizeof(u32))) /* define test direction */ #define DIR_READ 0 #define DIR_WRITE 1 static union { u64 l[2]; u32 s[4]; } test_pattern; static int num_ptn32; #if CONFIG_IS_ENABLED(AM33XX) static inline void wdt_disable(void) { struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; writel(0xAAAA, &wdtimer->wdtwspr); while (readl(&wdtimer->wdtwwps) != 0x0) ; writel(0x5555, &wdtimer->wdtwspr); while (readl(&wdtimer->wdtwwps) != 0x0) ; } static inline void wdt_enable(void) { struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; writel(0xBBBB, &wdtimer->wdtwspr); while (readl(&wdtimer->wdtwwps) != 0x0) ; writel(0x4444, &wdtimer->wdtwspr); while (readl(&wdtimer->wdtwwps) != 0x0) ; } #else /* ! */ static inline void wdt_disable(void) {} static inline void wdt_enable(void) {} #endif /* CONFIG_IS_ENABLED(AM33XX) */ static int do_ddr_set_ptn(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { int i, n; if (argc < 1) return CMD_RET_USAGE; /* number of patterns: 2 exponent */ n = argc - 1; if (n > PTN_ARRAY_SIZE || (n & (n - 1))) return CMD_RET_USAGE; num_ptn32 = n; /* get patterns */ for (i = 0; i < n; i++) test_pattern.s[i] = simple_strtoul(argv[i + 1], NULL, 0); printf("Test pattern set\n"); return CMD_RET_SUCCESS; } static int do_ddr_show_ptn(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { if (!num_ptn32) { printf("No pattern available\n"); } else { u32 *buf = test_pattern.s; int len = num_ptn32; int i; printf("Pattern: "); for (i = 0 ; i < len; i++) printf("0x%08X ", *buf++); printf("\n"); } return CMD_RET_SUCCESS; } static void ddr_read32(u64 start_addr, u64 n_word, unsigned long iter) { while (iter--) { register volatile u32 *addr = (u32 *)start_addr; register u64 count = n_word; while (count) { (void)*addr++; PDEBUG("Read 0x%08X from 0x%p\n", val, addr - 1); count--; } } } static void ddr_read64(u64 start_addr, u64 n_word, unsigned long iter) { while (iter--) { register volatile u64 *addr = (u64 *)start_addr; register u64 count = n_word; if (num_ptn32 == 4) count *= 2; /* * 64 & 128 bit pattern. Increase the nummber of read * commands in the loop to generate longer burst signal */ while (count) { (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); (void)*addr++; PDEBUG("Read 0x%016llX from 0x%p\n", val, addr - 1); /* * underflow cannot happen since n_word = end - * start, end & start addresses are checked to be * multiple of 16 */ count -= 8; } } } static void ddr_write32(u64 start_addr, u64 n_word, unsigned long iter) { while (iter--) { register u32 *addr = (u32 *)start_addr; register u32 ptn = *test_pattern.s; register u64 count = n_word; while (count) { PDEBUG("Write 0x%08X to 0x%p\n", ptn, addr); *addr++ = ptn; count--; } } } static void ddr_write64(u64 start_addr, u64 n_word, unsigned long iter) { while (iter--) { register u64 *addr = (u64 *)start_addr; register u64 ptnA = test_pattern.l[0]; register u64 ptnB = test_pattern.l[1]; register u64 count = n_word; if (num_ptn32 == 2) ptnB = ptnA; else count *= 2; /* * 64 & 128 bit pattern. Increase the nummber of write * commands in the loop to generate longer burst signal */ while (count) { PDEBUG("Write 0x%016llX to 0x%p\n", ptnA, addr); *addr++ = ptnA; PDEBUG("Write 0x%016llX to 0x%p\n", ptnB, addr); *addr++ = ptnB; PDEBUG("Write 0x%016llX to 0x%p\n", ptnA, addr); *addr++ = ptnA; PDEBUG("Write 0x%016llX to 0x%p\n", ptnB, addr); *addr++ = ptnB; PDEBUG("Write 0x%016llX to 0x%p\n", ptnA, addr); *addr++ = ptnA; PDEBUG("Write 0x%016llX to 0x%p\n", ptnB, addr); *addr++ = ptnB; PDEBUG("Write 0x%016llX to 0x%p\n", ptnA, addr); *addr++ = ptnA; PDEBUG("Write 0x%016llX to 0x%p\n", ptnB, addr); *addr++ = ptnB; /* * underflow cannot happen since n_word = end - * start, end & start addresses are checked to be * multiple of 16 */ count -= 8; } } } static int do_ddr_si_test(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { u64 start_addr, end_addr, n_word; u64 ts_start, ts_end; unsigned long iteration, wr_iter; int direction, i; if (argc < 3 || argc > 4) return CMD_RET_USAGE; /* get arguments */ direction = strcmp(argv[0], "read") ? DIR_WRITE : DIR_READ; start_addr = simple_strtoul(argv[1], NULL, 0); end_addr = simple_strtoul(argv[2], NULL, 0); iteration = simple_strtoul(argv[3], NULL, 10); n_word = (end_addr - start_addr) / (num_ptn32 * 4); printf("\nDDR signal integrity %s test: start\n", argv[0]); /* checks */ if (start_addr & 0xF) { printf("ERROR: start_address should be 16 bytes aligned\n\n"); return CMD_RET_USAGE; } if (end_addr & 0xF) { printf("ERROR: end_address should be 16 bytes aligned\n\n"); return CMD_RET_USAGE; } if (start_addr >= end_addr) { printf("ERROR: end_address is not bigger than start_address\n\n"); return CMD_RET_USAGE; } if (!iteration) { printf("ERROR: no iteration specified\n\n"); return CMD_RET_USAGE; } if (!num_ptn32) { printf("ERROR: no test pattern specified\n\n"); return CMD_RET_USAGE; } /* print parameters */ printf("start_address = 0x%016llX\n", start_addr); printf("end_address = 0x%016llX\n", end_addr); printf("iterations = %lu\n", iteration); /* print pattern */ printf("test pattern 0x"); for (i = 0; i < num_ptn32; i++) printf("%08X", test_pattern.s[i]); printf("\n"); wdt_disable(); /* writing */ printf("Writing..\n"); ts_start = get_timer_us(0); if (direction == DIR_READ) wr_iter = 1; else wr_iter = iteration; if (num_ptn32 == 1) ddr_write32(start_addr, n_word, wr_iter); else ddr_write64(start_addr, n_word, wr_iter); ts_end = get_timer_us(0); /* reading */ if (direction == DIR_READ) { printf("Reading..\n"); /* we need read time, just overwrite */ ts_start = get_timer_us(0); if (num_ptn32 == 1) ddr_read32(start_addr, n_word, iteration); else ddr_read64(start_addr, n_word, iteration); ts_end = get_timer_us(0); } wdt_enable(); /* print stats */ printf("DONE."); printf(" Bytes=%llu ", n_word * num_ptn32 * 4 * iteration); printf(" Time=%llu us ", ts_end - ts_start); printf("\nDDR signal integrity %s test: end\n", argv[0]); return CMD_RET_SUCCESS; } static char ddr_si_help_text[] = "- DDR signal integrity test\n\n" "ddr_si setptn <pattern> [<pattern>] : set [1,2,4] 32-bit patterns\n" "ddr_si showptn : show patterns\n" "ddr_si read <start> <end> <iterations> : run test for reading\n" "ddr_si write <start> <end> <iterations> : run test for writing\n" "\nWith\n" "\t<pattern>: 32-bit pattern in hex format\n" "\t<start>: test start address in hex format\n" "\t<end>: test end address in hex format\n" "\t<iterations>: number of iterations\n"; U_BOOT_CMD_WITH_SUBCMDS(ddr_si, "DDR si test", ddr_si_help_text, U_BOOT_SUBCMD_MKENT(setptn, 5, 0, do_ddr_set_ptn), U_BOOT_SUBCMD_MKENT(showptn, 1, 0, do_ddr_show_ptn), U_BOOT_SUBCMD_MKENT(read, 4, 0, do_ddr_si_test), U_BOOT_SUBCMD_MKENT(write, 4, 0, do_ddr_si_test)); |