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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 | // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2013 * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc */ #include <i2c.h> #include <dm.h> #include <regmap.h> #include <log.h> #include <asm/global_data.h> #include <asm/unaligned.h> #include <linux/bitops.h> #include <linux/delay.h> struct ihs_i2c_priv { uint speed; struct regmap *map; }; struct ihs_i2c_regs { u16 interrupt_status; u16 interrupt_enable_control; u16 write_mailbox_ext; u16 write_mailbox; u16 read_mailbox_ext; u16 read_mailbox; }; #define ihs_i2c_set(map, member, val) \ regmap_set(map, struct ihs_i2c_regs, member, val) #define ihs_i2c_get(map, member, valp) \ regmap_get(map, struct ihs_i2c_regs, member, valp) enum { I2CINT_ERROR_EV = BIT(13), I2CINT_TRANSMIT_EV = BIT(14), I2CINT_RECEIVE_EV = BIT(15), }; enum { I2CMB_READ = 0 << 10, I2CMB_WRITE = 1 << 10, I2CMB_1BYTE = 0 << 11, I2CMB_2BYTE = 1 << 11, I2CMB_DONT_HOLD_BUS = 0 << 13, I2CMB_HOLD_BUS = 1 << 13, I2CMB_NATIVE = 2 << 14, }; enum { I2COP_WRITE = 0, I2COP_READ = 1, }; static int wait_for_int(struct udevice *dev, int read) { u16 val; uint ctr = 0; struct ihs_i2c_priv *priv = dev_get_priv(dev); ihs_i2c_get(priv->map, interrupt_status, &val); /* Wait until error or receive/transmit interrupt was raised */ while (!(val & (I2CINT_ERROR_EV | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV)))) { udelay(10); if (ctr++ > 5000) { debug("%s: timed out\n", __func__); return -ETIMEDOUT; } ihs_i2c_get(priv->map, interrupt_status, &val); } return (val & I2CINT_ERROR_EV) ? -EIO : 0; } static int ihs_i2c_transfer(struct udevice *dev, uchar chip, uchar *buffer, int len, int read, bool is_last) { u16 val; u16 data; int res; struct ihs_i2c_priv *priv = dev_get_priv(dev); /* Clear interrupt status */ data = I2CINT_ERROR_EV | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV; ihs_i2c_set(priv->map, interrupt_status, data); ihs_i2c_get(priv->map, interrupt_status, &val); /* If we want to write and have data, write the bytes to the mailbox */ if (!read && len) { val = buffer[0]; if (len > 1) val |= buffer[1] << 8; ihs_i2c_set(priv->map, write_mailbox_ext, val); } data = I2CMB_NATIVE | (read ? 0 : I2CMB_WRITE) | (chip << 1) | ((len > 1) ? I2CMB_2BYTE : 0) | (is_last ? 0 : I2CMB_HOLD_BUS); ihs_i2c_set(priv->map, write_mailbox, data); res = wait_for_int(dev, read); if (res) { if (res == -ETIMEDOUT) debug("%s: time out while waiting for event\n", __func__); return res; } /* If we want to read, get the bytes from the mailbox */ if (read) { ihs_i2c_get(priv->map, read_mailbox_ext, &val); buffer[0] = val & 0xff; if (len > 1) buffer[1] = val >> 8; } return 0; } static int ihs_i2c_send_buffer(struct udevice *dev, uchar chip, u8 *data, int len, bool hold_bus, int read) { int res; while (len) { int transfer = min(len, 2); bool is_last = len <= transfer; res = ihs_i2c_transfer(dev, chip, data, transfer, read, hold_bus ? false : is_last); if (res) return res; data += transfer; len -= transfer; } return 0; } static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int alen, bool hold_bus) { return ihs_i2c_send_buffer(dev, chip, addr, alen, hold_bus, I2COP_WRITE); } static int ihs_i2c_access(struct udevice *dev, uchar chip, u8 *addr, int alen, uchar *buffer, int len, int read) { int res; /* Don't hold the bus if length of data to send/receive is zero */ if (len <= 0) return -EINVAL; res = ihs_i2c_address(dev, chip, addr, alen, len); if (res) return res; return ihs_i2c_send_buffer(dev, chip, buffer, len, false, read); } int ihs_i2c_probe(struct udevice *bus) { struct ihs_i2c_priv *priv = dev_get_priv(bus); regmap_init_mem(dev_ofnode(bus), &priv->map); return 0; } static int ihs_i2c_set_bus_speed(struct udevice *bus, uint speed) { struct ihs_i2c_priv *priv = dev_get_priv(bus); if (speed != priv->speed && priv->speed != 0) return -EINVAL; priv->speed = speed; return 0; } static int ihs_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) { struct i2c_msg *dmsg, *omsg, dummy; memset(&dummy, 0, sizeof(struct i2c_msg)); /* We expect either two messages (one with an offset and one with the * actual data) or one message (just data) */ if (nmsgs > 2 || nmsgs == 0) { debug("%s: Only one or two messages are supported\n", __func__); return -ENOTSUPP; } omsg = nmsgs == 1 ? &dummy : msg; dmsg = nmsgs == 1 ? msg : msg + 1; if (dmsg->flags & I2C_M_RD) return ihs_i2c_access(bus, dmsg->addr, omsg->buf, omsg->len, dmsg->buf, dmsg->len, I2COP_READ); else return ihs_i2c_access(bus, dmsg->addr, omsg->buf, omsg->len, dmsg->buf, dmsg->len, I2COP_WRITE); } static int ihs_i2c_probe_chip(struct udevice *bus, u32 chip_addr, u32 chip_flags) { uchar buffer[2]; int res; res = ihs_i2c_transfer(bus, chip_addr, buffer, 0, I2COP_READ, true); if (res) return res; return 0; } static const struct dm_i2c_ops ihs_i2c_ops = { .xfer = ihs_i2c_xfer, .probe_chip = ihs_i2c_probe_chip, .set_bus_speed = ihs_i2c_set_bus_speed, }; static const struct udevice_id ihs_i2c_ids[] = { { .compatible = "gdsys,ihs_i2cmaster", }, { /* sentinel */ } }; U_BOOT_DRIVER(i2c_ihs) = { .name = "i2c_ihs", .id = UCLASS_I2C, .of_match = ihs_i2c_ids, .probe = ihs_i2c_probe, .priv_auto = sizeof(struct ihs_i2c_priv), .ops = &ihs_i2c_ops, }; |