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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 | // SPDX-License-Identifier: GPL-2.0 /* * TI Generic PHY Init to register any TI Ethernet PHYs * * Author: Dan Murphy <dmurphy@ti.com> * * Copyright (C) 2019-20 Texas Instruments Inc. */ #include <phy.h> #include "ti_phy_init.h" #define DP83822_DEVADDR 0x1f #define MII_DP83822_RCSR 0x17 /* RCSR bits */ #define DP83822_RX_CLK_SHIFT BIT(12) #define DP83822_TX_CLK_SHIFT BIT(11) /* DP83822 specific RGMII RX/TX delay configuration. */ static int dp83822_config(struct phy_device *phydev) { ofnode node = phy_get_ofnode(phydev); u32 rgmii_delay = 0; u32 rx_delay = 0; u32 tx_delay = 0; int ret; ret = ofnode_read_u32(node, "rx-internal-delay-ps", &rx_delay); if (ret) { rx_delay = phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID; } ret = ofnode_read_u32(node, "tx-internal-delay-ps", &tx_delay); if (ret) { tx_delay = phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID; } /* Bit set means Receive path internal clock shift is ENABLED */ if (rx_delay) rgmii_delay |= DP83822_RX_CLK_SHIFT; /* Bit set means Transmit path internal clock shift is DISABLED */ if (!tx_delay) rgmii_delay |= DP83822_TX_CLK_SHIFT; ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR, DP83822_RX_CLK_SHIFT | DP83822_TX_CLK_SHIFT, rgmii_delay); if (ret) return ret; return genphy_config_aneg(phydev); } U_BOOT_PHY_DRIVER(dp83822) = { .name = "TI DP83822", .uid = 0x2000a240, .mask = 0xfffffff0, .features = PHY_BASIC_FEATURES, .config = &dp83822_config, .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; U_BOOT_PHY_DRIVER(dp83826nc) = { .name = "TI DP83826NC", .uid = 0x2000a110, .mask = 0xfffffff0, .features = PHY_BASIC_FEATURES, .config = &genphy_config_aneg, .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; U_BOOT_PHY_DRIVER(dp83826c) = { .name = "TI DP83826C", .uid = 0x2000a130, .mask = 0xfffffff0, .features = PHY_BASIC_FEATURES, .config = &genphy_config_aneg, .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; U_BOOT_PHY_DRIVER(dp83825s) = { .name = "TI DP83825S", .uid = 0x2000a140, .mask = 0xfffffff0, .features = PHY_BASIC_FEATURES, .config = &genphy_config_aneg, .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; U_BOOT_PHY_DRIVER(dp83825i) = { .name = "TI DP83825I", .uid = 0x2000a150, .mask = 0xfffffff0, .features = PHY_BASIC_FEATURES, .config = &genphy_config_aneg, .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; U_BOOT_PHY_DRIVER(dp83825m) = { .name = "TI DP83825M", .uid = 0x2000a160, .mask = 0xfffffff0, .features = PHY_BASIC_FEATURES, .config = &genphy_config_aneg, .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; U_BOOT_PHY_DRIVER(dp83825cs) = { .name = "TI DP83825CS", .uid = 0x2000a170, .mask = 0xfffffff0, .features = PHY_BASIC_FEATURES, .config = &genphy_config_aneg, .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; |