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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 | // SPDX-License-Identifier: GPL-2.0+ /* * Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com> */ #include <dm.h> #include <power/pmic.h> #include <power/regulator.h> #include <power/max77663.h> /* fist row is control registers, second is voltage registers */ static const char max77663_sd_reg[][MAX77663_SD_NUM] = { { 0x1d, 0x1e, 0x1f, 0x20, 0x21 }, { 0x16, 0x17, 0x18, 0x19, 0x2a }, }; static const char max77663_ldo_reg[MAX77663_LDO_NUM] = { 0x23, 0x25, 0x27, 0x29, 0x2b, 0x2d, 0x2f, 0x31, 0x33 }; static int max77663_sd_enable(struct udevice *dev, int op, bool *enable) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); u32 adr = uc_pdata->ctrl_reg; int val, ret; val = pmic_reg_read(dev->parent, adr); if (val < 0) return val; if (op == PMIC_OP_GET) { if (val & SD_STATUS_MASK) *enable = true; else *enable = false; return 0; } else if (op == PMIC_OP_SET) { val &= ~SD_STATUS_MASK; if (*enable) val |= SD_STATUS_MASK; ret = pmic_reg_write(dev->parent, adr, val); if (ret) return ret; } return 0; } /** * max77663_*_volt2hex() - convert voltage in uV into * applicable to register hex value * * @idx: regulator index * @uV: voltage in uV * * Return: voltage in hex on success, -ve on failure */ static int max77663_sd_volt2hex(int idx, int uV) { switch (idx) { case 0: /* SD0 has max voltage 1.4V */ if (uV > SD0_VOLT_MAX) return -EINVAL; break; case 1: /* SD1 has max voltage 1.55V */ if (uV > SD1_VOLT_MAX) return -EINVAL; break; default: /* SD2 and SD3 have max voltage 3.79V */ if (uV > SD_VOLT_MAX) return -EINVAL; break; }; if (uV < SD_VOLT_MIN) uV = SD_VOLT_MIN; return (uV - SD_VOLT_BASE) / 12500; } /** * max77663_*_hex2volt() - convert register hex value into * actual voltage in uV * * @idx: regulator index * @hex: hex value of register * * Return: voltage in uV on success, -ve on failure */ static int max77663_sd_hex2volt(int idx, int hex) { switch (idx) { case 0: /* SD0 has max voltage 1.4V */ if (hex > SD0_VOLT_MAX_HEX) return -EINVAL; break; case 1: /* SD1 has max voltage 1.55V */ if (hex > SD1_VOLT_MAX_HEX) return -EINVAL; break; default: /* SD2 and SD3 have max voltage 3.79V */ if (hex > SD_VOLT_MAX_HEX) return -EINVAL; break; }; if (hex < SD_VOLT_MIN_HEX) hex = SD_VOLT_MIN_HEX; return SD_VOLT_BASE + hex * 12500; } static int max77663_sd_val(struct udevice *dev, int op, int *uV) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); u32 adr = uc_pdata->volt_reg; int idx = dev->driver_data; int hex, ret; if (op == PMIC_OP_GET) { hex = pmic_reg_read(dev->parent, adr); if (hex < 0) return hex; *uV = 0; ret = max77663_sd_hex2volt(idx, hex); if (ret < 0) return ret; *uV = ret; return 0; } /* SD regulators use entire register for voltage */ hex = max77663_sd_volt2hex(idx, *uV); if (hex < 0) return hex; return pmic_reg_write(dev->parent, adr, hex); } static int max77663_sd_probe(struct udevice *dev) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); int idx = dev->driver_data; uc_pdata->type = REGULATOR_TYPE_BUCK; uc_pdata->ctrl_reg = max77663_sd_reg[0][idx]; uc_pdata->volt_reg = max77663_sd_reg[1][idx]; return 0; } static int sd_get_value(struct udevice *dev) { int uV; int ret; ret = max77663_sd_val(dev, PMIC_OP_GET, &uV); if (ret) return ret; return uV; } static int sd_set_value(struct udevice *dev, int uV) { return max77663_sd_val(dev, PMIC_OP_SET, &uV); } static int sd_get_enable(struct udevice *dev) { bool enable = false; int ret; ret = max77663_sd_enable(dev, PMIC_OP_GET, &enable); if (ret) return ret; return enable; } static int sd_set_enable(struct udevice *dev, bool enable) { return max77663_sd_enable(dev, PMIC_OP_SET, &enable); } static const struct dm_regulator_ops max77663_sd_ops = { .get_value = sd_get_value, .set_value = sd_set_value, .get_enable = sd_get_enable, .set_enable = sd_set_enable, }; U_BOOT_DRIVER(max77663_sd) = { .name = MAX77663_SD_DRIVER, .id = UCLASS_REGULATOR, .ops = &max77663_sd_ops, .probe = max77663_sd_probe, }; static int max77663_ldo_enable(struct udevice *dev, int op, bool *enable) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); u32 adr = uc_pdata->ctrl_reg; int val, ret; val = pmic_reg_read(dev->parent, adr); if (val < 0) return val; if (op == PMIC_OP_GET) { if (val & LDO_STATUS_MASK) *enable = true; else *enable = false; return 0; } else if (op == PMIC_OP_SET) { val &= ~LDO_STATUS_MASK; if (*enable) val |= LDO_STATUS_MASK; ret = pmic_reg_write(dev->parent, adr, val); if (ret) return ret; } return 0; } static int max77663_ldo_volt2hex(int idx, int uV) { switch (idx) { case 0: case 1: if (uV > LDO01_VOLT_MAX) return -EINVAL; return (uV - LDO_VOLT_BASE) / 25000; case 4: if (uV > LDO4_VOLT_MAX) return -EINVAL; return (uV - LDO_VOLT_BASE) / 12500; default: if (uV > LDO_VOLT_MAX) return -EINVAL; return (uV - LDO_VOLT_BASE) / 50000; }; } static int max77663_ldo_hex2volt(int idx, int hex) { if (hex > LDO_VOLT_MAX_HEX) return -EINVAL; switch (idx) { case 0: case 1: return (hex * 25000) + LDO_VOLT_BASE; case 4: return (hex * 12500) + LDO_VOLT_BASE; default: return (hex * 50000) + LDO_VOLT_BASE; }; } static int max77663_ldo_val(struct udevice *dev, int op, int *uV) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); u32 adr = uc_pdata->ctrl_reg; int idx = dev->driver_data; int hex, val, ret; val = pmic_reg_read(dev->parent, adr); if (val < 0) return val; if (op == PMIC_OP_GET) { *uV = 0; ret = max77663_ldo_hex2volt(idx, val & LDO_VOLT_MASK); if (ret < 0) return ret; *uV = ret; return 0; } hex = max77663_ldo_volt2hex(idx, *uV); if (hex < 0) return hex; val &= ~LDO_VOLT_MASK; return pmic_reg_write(dev->parent, adr, val | hex); } static int max77663_ldo_probe(struct udevice *dev) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); int idx = dev->driver_data; uc_pdata->type = REGULATOR_TYPE_LDO; uc_pdata->ctrl_reg = max77663_ldo_reg[idx]; return 0; } static int ldo_get_value(struct udevice *dev) { int uV; int ret; ret = max77663_ldo_val(dev, PMIC_OP_GET, &uV); if (ret) return ret; return uV; } static int ldo_set_value(struct udevice *dev, int uV) { return max77663_ldo_val(dev, PMIC_OP_SET, &uV); } static int ldo_get_enable(struct udevice *dev) { bool enable = false; int ret; ret = max77663_ldo_enable(dev, PMIC_OP_GET, &enable); if (ret) return ret; return enable; } static int ldo_set_enable(struct udevice *dev, bool enable) { return max77663_ldo_enable(dev, PMIC_OP_SET, &enable); } static const struct dm_regulator_ops max77663_ldo_ops = { .get_value = ldo_get_value, .set_value = ldo_set_value, .get_enable = ldo_get_enable, .set_enable = ldo_set_enable, }; U_BOOT_DRIVER(max77663_ldo) = { .name = MAX77663_LDO_DRIVER, .id = UCLASS_REGULATOR, .ops = &max77663_ldo_ops, .probe = max77663_ldo_probe, }; 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