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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 | // SPDX-License-Identifier: GPL-2.0+ /* * Copyright(C) 2024 Svyatoslav Ryhel <clamor95@gmail.com> */ #include <dm.h> #include <power/pmic.h> #include <power/regulator.h> #include <power/max8907.h> static const char max8907_regmap[] = { 0x00, MAX8907_REG_SDCTL1, MAX8907_REG_SDCTL2, MAX8907_REG_SDCTL3, MAX8907_REG_LDOCTL1, MAX8907_REG_LDOCTL2, MAX8907_REG_LDOCTL3, MAX8907_REG_LDOCTL4, MAX8907_REG_LDOCTL5, MAX8907_REG_LDOCTL6, MAX8907_REG_LDOCTL7, MAX8907_REG_LDOCTL8, MAX8907_REG_LDOCTL9, MAX8907_REG_LDOCTL10, MAX8907_REG_LDOCTL11, MAX8907_REG_LDOCTL12, MAX8907_REG_LDOCTL13, MAX8907_REG_LDOCTL14, MAX8907_REG_LDOCTL15, MAX8907_REG_LDOCTL16, MAX8907_REG_LDOCTL17, MAX8907_REG_LDOCTL18, MAX8907_REG_LDOCTL19, MAX8907_REG_LDOCTL20 }; static int max8907_enable(struct udevice *dev, int op, bool *enable) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); int val, ret = 0; if (op == PMIC_OP_GET) { val = pmic_reg_read(dev->parent, uc_pdata->ctrl_reg); if (val < 0) return val; if (val & MAX8907_MASK_LDO_EN) *enable = true; else *enable = false; } else if (op == PMIC_OP_SET) { if (*enable) { ret = pmic_clrsetbits(dev->parent, uc_pdata->ctrl_reg, MAX8907_MASK_LDO_EN | MAX8907_MASK_LDO_SEQ, MAX8907_MASK_LDO_EN | MAX8907_MASK_LDO_SEQ); } else { ret = pmic_clrsetbits(dev->parent, uc_pdata->ctrl_reg, MAX8907_MASK_LDO_EN | MAX8907_MASK_LDO_SEQ, MAX8907_MASK_LDO_SEQ); } } return ret; } static int max8907_get_enable(struct udevice *dev) { bool enable = false; int ret; ret = max8907_enable(dev, PMIC_OP_GET, &enable); if (ret) return ret; return enable; } static int max8907_set_enable(struct udevice *dev, bool enable) { return max8907_enable(dev, PMIC_OP_SET, &enable); } /** * max8907_volt2hex() - convert voltage in uV into * applicable to register hex value * * @idx: regulator index * @uV: voltage in uV * * Return: voltage in hex on success, -ve on failure */ static int max8907_volt2hex(int idx, int uV) { switch (idx) { case 1: /* SD1 */ if (uV > SD1_VOLT_MAX || uV < SD1_VOLT_MIN) break; return (uV - SD1_VOLT_MIN) / SD1_VOLT_STEP; case 2: /* SD2 */ if (uV > SD2_VOLT_MAX || uV < SD2_VOLT_MIN) break; return (uV - SD2_VOLT_MIN) / SD2_VOLT_STEP; case 3: /* SD3 */ if (uV > SD2_VOLT_MAX || uV < SD2_VOLT_MIN) break; return (uV - SD2_VOLT_MIN) / SD2_VOLT_STEP; case 5: /* LDO2 */ case 6: /* LDO3 */ case 20: /* LDO17 */ case 21: /* LDO18 */ if (uV > LDO_650_VOLT_MAX || uV < LDO_650_VOLT_MIN) break; return (uV - LDO_650_VOLT_MIN) / LDO_650_VOLT_STEP; default: /* LDO1, 4..16, 19..20 */ if (uV > LDO_750_VOLT_MAX || uV < LDO_750_VOLT_MIN) break; return (uV - LDO_750_VOLT_MIN) / LDO_750_VOLT_STEP; }; return -EINVAL; } /** * max8907_hex2volt() - convert register hex value into * actual voltage in uV * * @idx: regulator index * @hex: hex value of register * * Return: voltage in uV on success, -ve on failure */ static int max8907_hex2volt(int idx, int hex) { switch (idx) { case 1: return hex * SD1_VOLT_STEP + SD1_VOLT_MIN; case 2: return hex * SD2_VOLT_STEP + SD2_VOLT_MIN; case 3: return hex * SD3_VOLT_STEP + SD3_VOLT_MIN; case 5: /* LDO2 */ case 6: /* LDO3 */ case 20: /* LDO17 */ case 21: /* LDO18 */ return hex * LDO_650_VOLT_STEP + LDO_650_VOLT_MIN; default: /* LDO1, 4..16, 19..20 */ return hex * LDO_750_VOLT_STEP + LDO_750_VOLT_MIN; }; return -EINVAL; } static int max8907_val(struct udevice *dev, int op, int *uV) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); int idx = dev->driver_data; int hex, ret; if (op == PMIC_OP_GET) { hex = pmic_reg_read(dev->parent, uc_pdata->volt_reg); if (hex < 0) return hex; *uV = 0; ret = max8907_hex2volt(idx, hex); if (ret < 0) return ret; *uV = ret; return 0; } hex = max8907_volt2hex(idx, *uV); if (hex < 0) return hex; return pmic_reg_write(dev->parent, uc_pdata->volt_reg, hex); } static int max8907_get_value(struct udevice *dev) { int uV; int ret; ret = max8907_val(dev, PMIC_OP_GET, &uV); if (ret) return ret; return uV; } static int max8907_set_value(struct udevice *dev, int uV) { return max8907_val(dev, PMIC_OP_SET, &uV); } static const struct dm_regulator_ops max8907_regulator_ops = { .get_value = max8907_get_value, .set_value = max8907_set_value, .get_enable = max8907_get_enable, .set_enable = max8907_set_enable, }; static int max8907_sd_probe(struct udevice *dev) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); int idx = dev->driver_data; uc_pdata->type = REGULATOR_TYPE_BUCK; uc_pdata->ctrl_reg = max8907_regmap[idx]; uc_pdata->volt_reg = uc_pdata->ctrl_reg + MAX8907_VOUT; return 0; } U_BOOT_DRIVER(max8907_sd) = { .name = MAX8907_SD_DRIVER, .id = UCLASS_REGULATOR, .ops = &max8907_regulator_ops, .probe = max8907_sd_probe, }; static int max8907_ldo_probe(struct udevice *dev) { struct dm_regulator_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); /* LDO regulator id is shifted by number for SD regulators */ int idx = dev->driver_data + 3; uc_pdata->type = REGULATOR_TYPE_LDO; uc_pdata->ctrl_reg = max8907_regmap[idx]; uc_pdata->volt_reg = uc_pdata->ctrl_reg + MAX8907_VOUT; return 0; } U_BOOT_DRIVER(max8907_ldo) = { .name = MAX8907_LDO_DRIVER, .id = UCLASS_REGULATOR, .ops = &max8907_regulator_ops, .probe = max8907_ldo_probe, }; |