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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 | // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com> */ #include <malloc.h> #include <asm/io.h> #include <clk.h> #include <dm.h> #include <dm/device_compat.h> #include <dm/devres.h> #include <dm/ofnode.h> #include <generic-phy.h> #include <reset.h> #include "ohci.h" #include <asm/arch/da8xx-usb.h> struct da8xx_ohci { ohci_t ohci; struct clk *clocks; /* clock list */ struct phy phy; int clock_count; /* number of clock in clock list */ }; static int usb_phy_on(void) { unsigned long timeout; clrsetbits_le32(&davinci_syscfg_regs->cfgchip2, (CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ | CFGCHIP2_USB1PHYCLKMUX), (CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX | CFGCHIP2_USB1SUSPENDM)); /* wait until the usb phy pll locks */ timeout = get_timer(0); while (get_timer(timeout) < 10) { if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) return 1; } /* USB phy was not turned on */ return 0; } static void usb_phy_off(void) { /* Power down the on-chip PHY. */ clrsetbits_le32(&davinci_syscfg_regs->cfgchip2, CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM, CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET); } int usb_cpu_init(void) { /* enable psc for usb2.0 */ lpsc_on(DAVINCI_LPSC_USB20); /* enable psc for usb1.0 */ lpsc_on(DAVINCI_LPSC_USB11); /* start the on-chip usb phy and its pll */ if (usb_phy_on()) return 0; return 1; } int usb_cpu_stop(void) { usb_phy_off(); /* turn off the usb clock and assert the module reset */ lpsc_disable(DAVINCI_LPSC_USB11); lpsc_disable(DAVINCI_LPSC_USB20); return 0; } int usb_cpu_init_fail(void) { return usb_cpu_stop(); } #if CONFIG_IS_ENABLED(DM_USB) static int ohci_da8xx_probe(struct udevice *dev) { struct ohci_regs *regs = dev_read_addr_ptr(dev); struct da8xx_ohci *priv = dev_get_priv(dev); int i, err, ret, clock_nb; err = 0; priv->clock_count = 0; clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0); if (clock_nb < 0) return clock_nb; if (clock_nb > 0) { priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk), GFP_KERNEL); if (!priv->clocks) return -ENOMEM; for (i = 0; i < clock_nb; i++) { err = clk_get_by_index(dev, i, &priv->clocks[i]); if (err < 0) break; err = clk_enable(&priv->clocks[i]); if (err) { dev_err(dev, "failed to enable clock %d\n", i); goto clk_err; } priv->clock_count++; } } err = usb_cpu_init(); if (err) goto clk_err; err = ohci_register(dev, regs); if (err) goto phy_err; return 0; phy_err: ret = usb_cpu_stop(); if (ret) dev_err(dev, "failed to shutdown usb phy\n"); clk_err: ret = clk_release_all(priv->clocks, priv->clock_count); if (ret) dev_err(dev, "failed to disable all clocks\n"); return err; } static int ohci_da8xx_remove(struct udevice *dev) { struct da8xx_ohci *priv = dev_get_priv(dev); int ret; ret = ohci_deregister(dev); if (ret) return ret; ret = usb_cpu_stop(); if (ret) return ret; return clk_release_all(priv->clocks, priv->clock_count); } static const struct udevice_id da8xx_ohci_ids[] = { { .compatible = "ti,da830-ohci" }, { } }; U_BOOT_DRIVER(ohci_generic) = { .name = "ohci-da8xx", .id = UCLASS_USB, .of_match = da8xx_ohci_ids, .probe = ohci_da8xx_probe, .remove = ohci_da8xx_remove, .ops = &ohci_usb_ops, .priv_auto = sizeof(struct da8xx_ohci), .flags = DM_FLAG_ALLOC_PRIV_DMA | DM_FLAG_OS_PREPARE, }; #endif |