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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 | // SPDX-License-Identifier: GPL-2.0-or-later /* * (C) Copyright 2024 - Analog Devices, Inc. */ #include "sc5xx.dtsi" / { gic: interrupt-controller@310B2000 { compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x310B2000 0x1000>, <0x310B4000 0x100>; }; soc { rcu: rcu@0x3108B000 { compatible = "adi,reset-controller"; reg = <0x3108B000 0x1000>; adi,sharc-min = <1>; adi,sharc-max = <2>; adi,enable-reboot; status = "disabled"; }; mmc: mmc0@31010000 { compatible = "snps,dw-mshc"; reg = <0x31010000 0x400>; pinctrl-names = "default"; pinctrl-0 = <&mmc_default>; bus-width = <4>; fifo-depth = <128>; clock-names = "biu", "ciu"; max-frequency = <52000000>; status = "disabled"; }; usb0: musb@310c1000 { compatible = "adi,sc5xx-musb"; reg = <0x310c1000 0x390>; interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mc", "dma"; status = "okay"; }; usb1: musb@310c2000 { compatible = "adi,sc5xx-musb"; reg = <0x310c2000 0x390>; interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mc", "dma"; status = "disabled"; }; sharc1: sharc@0x28240000 { compatible = "adi,sc5xx-rproc"; reg = <0x28240000 0x100>; coreid = <1>; adi,rcu = <&rcu>; status = "disabled"; }; sharc2: sharc@0x28a40000 { compatible = "adi,sc5xx-rproc"; reg = <0x28a40000 0x100>; coreid = <2>; adi,rcu = <&rcu>; status = "disabled"; }; }; }; &timer0 { reg = <0x31001004 0x100>, <0x31001060 0x100>; clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; }; &pinctrl0 { mmc_default: mmc_pins { bootph-pre-ram; adi,pins = <ADI_ADSP_PIN('F', 2) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('F', 3) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('F', 4) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('F', 5) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('F', 10) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('F', 11) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('F', 12) ADI_ADSP_PINFUNC_ALT0>; }; eth0_default: eth0_pins { adi,pins = <ADI_ADSP_PIN('A', 0) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 1) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 2) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 3) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 4) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 5) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 6) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 7) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 8) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 9) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 10) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 11) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 12) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('A', 13) ADI_ADSP_PINFUNC_ALT0>; }; uart0_default: uart0_pins { bootph-pre-ram; adi,pins = <ADI_ADSP_PIN('C', 13) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('C', 14) ADI_ADSP_PINFUNC_ALT0>; }; spi2_default: spi2_pins { adi,pins = <ADI_ADSP_PIN('C', 1) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('C', 2) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('C', 3) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('C', 4) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('C', 5) ADI_ADSP_PINFUNC_ALT0>, <ADI_ADSP_PIN('C', 6) ADI_ADSP_PINFUNC_ALT0>; }; }; &pinctrl0 { adi,npins = <102>; }; &gpio0 { adi,ngpios = <102>; }; &clk { compatible = "adi,sc58x-clocks"; }; &uart0 { clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; }; &spi2 { clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK1>; reg = <0x31044000 0x1000>; flash1: is25lp512@1 { #address-cells = <1>; #size-cells = <1>; compatible = "jedec,spi-nor", "is25lp512"; reg = <1>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; bootph-pre-ram; }; }; &wdog { clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; }; ð0 { reg = <0x3100C000 0x1000>; }; &mmc { clocks = <&dummy>, <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; }; &i2c0 { clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; }; &i2c1 { clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; }; &i2c2 { clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; }; |