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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 | /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015, Linaro Limited * Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com> * * Authors: * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> */ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H /* * This file provides common defines for ARM SMC Calling Convention as * specified in * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html */ #define ARM_SMCCC_STD_CALL 0UL #define ARM_SMCCC_FAST_CALL 1UL #define ARM_SMCCC_TYPE_SHIFT 31 #define ARM_SMCCC_SMC_32 0 #define ARM_SMCCC_SMC_64 1 #define ARM_SMCCC_CALL_CONV_SHIFT 30 #define ARM_SMCCC_OWNER_MASK 0x3F #define ARM_SMCCC_OWNER_SHIFT 24 #define ARM_SMCCC_FUNC_MASK 0xFFFF #define ARM_SMCCC_IS_FAST_CALL(smc_val) \ ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT)) #define ARM_SMCCC_IS_64(smc_val) \ ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT)) #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK) #define ARM_SMCCC_OWNER_NUM(smc_val) \ (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK) #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ (((type) << ARM_SMCCC_TYPE_SHIFT) | \ ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ ((func_num) & ARM_SMCCC_FUNC_MASK)) #define ARM_SMCCC_OWNER_ARCH 0 #define ARM_SMCCC_OWNER_CPU 1 #define ARM_SMCCC_OWNER_SIP 2 #define ARM_SMCCC_OWNER_OEM 3 #define ARM_SMCCC_OWNER_STANDARD 4 #define ARM_SMCCC_OWNER_TRUSTED_APP 48 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 #define ARM_SMCCC_OWNER_TRUSTED_OS 50 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 #define ARM_SMCCC_QUIRK_NONE 0 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ #define ARM_SMCCC_VERSION 0x80000000 #define ARM_SMCCC_ARCH_FEATURES 0x80000001 #define ARM_SMCCC_VERSION_1_0 0x10000 #define ARM_SMCCC_VERSION_1_1 0x10001 #define ARM_SMCCC_VERSION_1_2 0x10002 #define ARM_SMCCC_VERSION_1_3 0x10003 #define ARM_SMCCC_RET_NOT_SUPPORTED ((unsigned long)-1) #ifndef __ASSEMBLY__ #include <linux/linkage.h> #include <linux/types.h> /** * struct arm_smccc_res - Result from SMC/HVC call * @a0-a3 result values from registers 0 to 3 */ struct arm_smccc_res { unsigned long a0; unsigned long a1; unsigned long a2; unsigned long a3; }; #ifdef CONFIG_ARM64 /** * struct arm_smccc_1_2_regs - Arguments for or Results from SMC call * @a0-a17 argument values from registers 0 to 17 */ struct arm_smccc_1_2_regs { unsigned long a0; unsigned long a1; unsigned long a2; unsigned long a3; unsigned long a4; unsigned long a5; unsigned long a6; unsigned long a7; unsigned long a8; unsigned long a9; unsigned long a10; unsigned long a11; unsigned long a12; unsigned long a13; unsigned long a14; unsigned long a15; unsigned long a16; unsigned long a17; }; /** * arm_smccc_1_2_smc() - make SMC calls * @args: arguments passed via struct arm_smccc_1_2_regs * @res: result values via struct arm_smccc_1_2_regs * * This function is used to make SMC calls following SMC Calling Convention * v1.2 or above. The content of the supplied param are copied from the * structure to registers prior to the SMC instruction. The return values * are updated with the content from registers on return from the SMC * instruction. */ asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, struct arm_smccc_1_2_regs *res); #endif /** * struct arm_smccc_quirk - Contains quirk information * @id: quirk identification * @state: quirk specific information * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 */ struct arm_smccc_quirk { int id; union { unsigned long a6; } state; }; /** * struct arm_smccc_feature - Driver registration data for discoverable feature * @driver_name: name of the driver relate to the SMCCC feature * @is_supported: callback to test if SMCCC feature is supported */ struct arm_smccc_feature { const char *driver_name; bool (*is_supported)(void (*invoke_fn)(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res)); }; #define ARM_SMCCC_FEATURE_DRIVER(__name) \ ll_entry_declare(struct arm_smccc_feature, __name, arm_smccc_feature) /** * __arm_smccc_smc() - make SMC calls * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. * * This function is used to make SMC calls following SMC Calling Convention. * The content of the supplied param are copied to registers 0 to 7 prior * to the SMC instruction. The return values are updated with the content * from register 0 to 3 on return from the SMC instruction. An optional * quirk structure provides vendor specific behavior. */ asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); /** * __arm_smccc_hvc() - make HVC calls * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. * * This function is used to make HVC calls following SMC Calling * Convention. The content of the supplied param are copied to registers 0 * to 7 prior to the HVC instruction. The return values are updated with * the content from register 0 to 3 on return from the HVC instruction. An * optional quirk structure provides vendor specific behavior. */ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) #endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/ |