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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 | /************************************************** * * copyright @ motorola, 1999 * *************************************************/ #include <mpc824x.h> #include <common.h> #include "epic.h" #define PRINT(format, args...) printf(format , ## args) typedef void (*VOIDFUNCPTR) (void); /* ptr to function returning void */ struct SrcVecTable SrcVecTable[MAXVEC] = /* Addr/Vector cross-reference tbl */ { { EPIC_EX_INT0_VEC_REG, "External Direct/Serial Source 0"}, { EPIC_EX_INT1_VEC_REG, "External Direct/Serial Source 1"}, { EPIC_EX_INT2_VEC_REG, "External Direct/Serial Source 2"}, { EPIC_EX_INT3_VEC_REG, "External Direct/Serial Source 3"}, { EPIC_EX_INT4_VEC_REG, "External Direct/Serial Source 4"}, { EPIC_SR_INT5_VEC_REG, "External Serial Source 5"}, { EPIC_SR_INT6_VEC_REG, "External Serial Source 6"}, { EPIC_SR_INT7_VEC_REG, "External Serial Source 7"}, { EPIC_SR_INT8_VEC_REG, "External Serial Source 8"}, { EPIC_SR_INT9_VEC_REG, "External Serial Source 9"}, { EPIC_SR_INT10_VEC_REG, "External Serial Source 10"}, { EPIC_SR_INT11_VEC_REG, "External Serial Source 11"}, { EPIC_SR_INT12_VEC_REG, "External Serial Source 12"}, { EPIC_SR_INT13_VEC_REG, "External Serial Source 13"}, { EPIC_SR_INT14_VEC_REG, "External Serial Source 14"}, { EPIC_SR_INT15_VEC_REG, "External Serial Source 15"}, { EPIC_I2C_INT_VEC_REG, "Internal I2C Source"}, { EPIC_DMA0_INT_VEC_REG, "Internal DMA0 Source"}, { EPIC_DMA1_INT_VEC_REG, "Internal DMA1 Source"}, { EPIC_MSG_INT_VEC_REG, "Internal Message Source"}, }; VOIDFUNCPTR intVecTbl[MAXVEC]; /* Interrupt vector table */ /**************************************************************************** * epicInit - Initialize the EPIC registers * * This routine resets the Global Configuration Register, thus it: * - Disables all interrupts * - Sets epic registers to reset values * - Sets the value of the Processor Current Task Priority to the * highest priority (0xF). * epicInit then sets the EPIC operation mode to Mixed Mode (vs. Pass * Through or 8259 compatible mode). * * If IRQType (input) is Direct IRQs: * - IRQType is written to the SIE bit of the EPIC Interrupt * Configuration register (ICR). * - clkRatio is ignored. * If IRQType is Serial IRQs: * - both IRQType and clkRatio will be written to the ICR register */ void epicInit ( unsigned int IRQType, /* Direct or Serial */ unsigned int clkRatio /* Clk Ratio for Serial IRQs */ ) { ULONG tmp; tmp = sysEUMBBARRead(EPIC_GLOBAL_REG); tmp |= 0xa0000000; /* Set the Global Conf. register */ sysEUMBBARWrite(EPIC_GLOBAL_REG, tmp); /* * Wait for EPIC to reset - CLH */ while( (sysEUMBBARRead(EPIC_GLOBAL_REG) & 0x80000000) == 1); sysEUMBBARWrite(EPIC_GLOBAL_REG, 0x20000000); tmp = sysEUMBBARRead(EPIC_INT_CONF_REG); /* Read interrupt conf. reg */ if (IRQType == EPIC_DIRECT_IRQ) /* direct mode */ sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp & 0xf7ffffff); else /* Serial mode */ { tmp = (clkRatio << 28) | 0x08000000; /* Set clock ratio */ sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp); } while (epicIntAck() != 0xff) /* Clear all pending interrupts */ epicEOI(); } /**************************************************************************** * epicIntEnable - Enable an interrupt source * * This routine clears the mask bit of an external, an internal or * a Timer register to enable the interrupt. * * RETURNS: None */ void epicIntEnable(int intVec) { ULONG tmp; ULONG srAddr; srAddr = SrcVecTable[intVec].srcAddr; /* Retrieve src Vec/Prio register */ tmp = sysEUMBBARRead(srAddr); tmp &= ~EPIC_VEC_PRI_MASK; /* Clear the mask bit */ tmp |= (EPIC_VEC_PRI_DFLT_PRI << 16); /* Set priority to Default - CLH */ tmp |= intVec; /* Set Vector number */ sysEUMBBARWrite(srAddr, tmp); return; } /**************************************************************************** * epicIntDisable - Disable an interrupt source * * This routine sets the mask bit of an external, an internal or * a Timer register to disable the interrupt. * * RETURNS: OK or ERROR * */ void epicIntDisable ( int intVec /* Interrupt vector number */ ) { ULONG tmp, srAddr; srAddr = SrcVecTable[intVec].srcAddr; tmp = sysEUMBBARRead(srAddr); tmp |= 0x80000000; /* Set the mask bit */ sysEUMBBARWrite(srAddr, tmp); return; } /**************************************************************************** * epicIntSourceConfig - Set properties of an interrupt source * * This function sets interrupt properites (Polarity, Sense, Interrupt * Prority, and Interrupt Vector) of an Interrupt Source. The properties * can be set when the current source is not in-request or in-service, * which is determined by the Activity bit. This routine return ERROR * if the the Activity bit is 1 (in-request or in-service). * * This function assumes that the Source Vector/Priority register (input) * is a valid address. * * RETURNS: OK or ERROR */ int epicIntSourceConfig ( int Vect, /* interrupt source vector number */ int Polarity, /* interrupt source polarity */ int Sense, /* interrupt source Sense */ int Prio /* interrupt source priority */ ) { ULONG tmp, newVal; ULONG actBit, srAddr; srAddr = SrcVecTable[Vect].srcAddr; tmp = sysEUMBBARRead(srAddr); actBit = (tmp & 40000000) >> 30; /* retrieve activity bit - bit 30 */ if (actBit == 1) return ERROR; tmp &= 0xff30ff00; /* Erase previously set P,S,Prio,Vector bits */ newVal = (Polarity << 23) | (Sense << 22) | (Prio << 16) | Vect; sysEUMBBARWrite(srAddr, tmp | newVal ); return (OK); } /**************************************************************************** * epicIntAck - acknowledge an interrupt * * This function reads the Interrupt acknowldge register and return * the vector number of the highest pending interrupt. * * RETURNS: Interrupt Vector number. */ unsigned int epicIntAck(void) { return(sysEUMBBARRead( EPIC_PROC_INT_ACK_REG )); } /**************************************************************************** * epicEOI - signal an end of interrupt * * This function writes 0x0 to the EOI register to signal end of interrupt. * It is usually called after an interrupt routine is served. * * RETURNS: None */ void epicEOI(void) { sysEUMBBARWrite(EPIC_PROC_EOI_REG, 0x0); } /**************************************************************************** * epicCurTaskPrioSet - sets the priority of the Processor Current Task * * This function should be called after epicInit() to lower the priority * of the processor current task. * * RETURNS: OK or ERROR */ int epicCurTaskPrioSet ( int prioNum /* New priority value */ ) { if ( (prioNum < 0) || (prioNum > 0xF)) return ERROR; sysEUMBBARWrite(EPIC_PROC_CTASK_PRI_REG, prioNum); return OK; } /************************************************************************ * function: epicIntTaskGet * * description: Get value of processor current interrupt task priority register * * note: ***********************************************************************/ unsigned char epicIntTaskGet() { /* get the interrupt task priority register */ ULONG reg; unsigned char rec; reg = sysEUMBBARRead( EPIC_PROC_CTASK_PRI_REG ); rec = ( reg & 0x0F ); return rec; } /************************************************************** * function: epicISR * * description: EPIC service routine called by the core exception * at 0x500 * * note: **************************************************************/ unsigned int epicISR(void) { return 0; } /************************************************************ * function: epicModeGet * * description: query EPIC mode, return 0 if pass through mode * return 1 if mixed mode * * note: *************************************************************/ unsigned int epicModeGet(void) { ULONG val; val = sysEUMBBARRead( EPIC_GLOBAL_REG ); return (( val & 0x20000000 ) >> 29); } /********************************************* * function: epicConfigGet * * description: Get the EPIC interrupt Configuration * return 0 if not error, otherwise return 1 * * note: ********************************************/ void epicConfigGet( unsigned int *clkRatio, unsigned int *serEnable) { ULONG val; val = sysEUMBBARRead( EPIC_INT_CONF_REG ); *clkRatio = ( val & 0x70000000 ) >> 28; *serEnable = ( val & 0x8000000 ) >> 27; } /******************************************************************* * sysEUMBBARRead - Read a 32-bit EUMBBAR register * * This routine reads the content of a register in the Embedded * Utilities Memory Block, and swaps to big endian before returning * the value. * * RETURNS: The content of the specified EUMBBAR register. */ ULONG sysEUMBBARRead ( ULONG regNum ) { ULONG temp; temp = *(ULONG *) (CFG_EUMB_ADDR + regNum); return ( LONGSWAP(temp)); } /******************************************************************* * sysEUMBBARWrite - Write a 32-bit EUMBBAR register * * This routine swaps the value to little endian then writes it to * a register in the Embedded Utilities Memory Block address space. * * RETURNS: N/A */ void sysEUMBBARWrite ( ULONG regNum, /* EUMBBAR register address */ ULONG regVal /* Value to be written */ ) { *(ULONG *) (CFG_EUMB_ADDR + regNum) = LONGSWAP(regVal); return ; } /******************************************************** * function: epicVendorId * * description: return the EPIC Vendor Identification * register: * * siliccon version, device id, and vendor id * * note: ********************************************************/ void epicVendorId ( unsigned int *step, unsigned int *devId, unsigned int *venId ) { ULONG val; val = sysEUMBBARRead( EPIC_VENDOR_ID_REG ); *step = ( val & 0x00FF0000 ) >> 16; *devId = ( val & 0x0000FF00 ) >> 8; *venId = ( val & 0x000000FF ); } /************************************************** * function: epicFeatures * * description: return the number of IRQ supported, * number of CPU, and the version of the * OpenEPIC * * note: *************************************************/ void epicFeatures ( unsigned int *noIRQs, unsigned int *noCPUs, unsigned int *verId ) { ULONG val; val = sysEUMBBARRead( EPIC_FEATURES_REG ); *noIRQs = ( val & 0x07FF0000 ) >> 16; *noCPUs = ( val & 0x00001F00 ) >> 8; *verId = ( val & 0x000000FF ); } /********************************************************* * function: epciTmFrequncySet * * description: Set the timer frequency reporting register ********************************************************/ void epicTmFrequencySet( unsigned int frq ) { sysEUMBBARWrite(EPIC_TM_FREQ_REG, frq); } /******************************************************* * function: epicTmFrequncyGet * * description: Get the current value of the Timer Frequency * Reporting register * ******************************************************/ unsigned int epicTmFrequencyGet(void) { return( sysEUMBBARRead(EPIC_TM_FREQ_REG)) ; } /**************************************************** * function: epicTmBaseSet * * description: Set the #n global timer base count register * return 0 if no error, otherwise return 1. * * note: ****************************************************/ unsigned int epicTmBaseSet ( ULONG srcAddr, /* Address of the Timer Base register */ unsigned int cnt, /* Base count */ unsigned int inhibit /* 1 - count inhibit */ ) { unsigned int val = 0x80000000; /* First inhibit counting the timer */ sysEUMBBARWrite(srcAddr, val) ; /* set the new value */ val = (cnt & 0x7fffffff) | ((inhibit & 0x1) << 31); sysEUMBBARWrite(srcAddr, val) ; return 0; } /*********************************************************************** * function: epicTmBaseGet * * description: Get the current value of the global timer base count register * return 0 if no error, otherwise return 1. * * note: ***********************************************************************/ unsigned int epicTmBaseGet( ULONG srcAddr, unsigned int *val ) { *val = sysEUMBBARRead( srcAddr ); *val = *val & 0x7fffffff; return 0; } /*********************************************************** * function: epicTmCountGet * * description: Get the value of a given global timer * current count register * return 0 if no error, otherwise return 1 * note: **********************************************************/ unsigned int epicTmCountGet( ULONG srcAddr, unsigned int *val ) { *val = sysEUMBBARRead( srcAddr ); *val = *val & 0x7fffffff; return 0; } /*********************************************************** * function: epicTmInhibit * * description: Stop counting of a given global timer * return 0 if no error, otherwise return 1 * * note: ***********************************************************/ unsigned int epicTmInhibit( unsigned int srcAddr ) { ULONG val; val = sysEUMBBARRead( srcAddr ); val |= 0x80000000; sysEUMBBARWrite( srcAddr, val ); return 0; } /****************************************************************** * function: epicTmEnable * * description: Enable counting of a given global timer * return 0 if no error, otherwise return 1 * * note: *****************************************************************/ unsigned int epicTmEnable( ULONG srcAddr ) { ULONG val; val = sysEUMBBARRead( srcAddr ); val &= 0x7fffffff; sysEUMBBARWrite( srcAddr, val ); return 0; } void epicSourcePrint(int Vect) { ULONG srcVal; srcVal = sysEUMBBARRead(SrcVecTable[Vect].srcAddr); PRINT("%s\n", SrcVecTable[Vect].srcName); PRINT("Address = 0x%lx\n", SrcVecTable[Vect].srcAddr); PRINT("Vector = %ld\n", (srcVal & 0x000000FF) ); PRINT("Mask = %ld\n", srcVal >> 31); PRINT("Activitiy = %ld\n", (srcVal & 40000000) >> 30); PRINT("Polarity = %ld\n", (srcVal & 0x00800000) >> 23); PRINT("Sense = %ld\n", (srcVal & 0x00400000) >> 22); PRINT("Priority = %ld\n", (srcVal & 0x000F0000) >> 16); } |