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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 | /* * (C) Copyright 2006 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> * Marius Groeger <mgroeger@sysgo.de> * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> * Alex Zuepke <azu@sysgo.de> * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ #include <common.h> #include <asm/arch/ixp425.h> #ifdef CONFIG_USE_IRQ #include <asm/proc-armv/ptrace.h> /* * When interrupts are enabled, use timer 2 for time/delay generation... */ #define FREQ 66666666 #define CLOCK_TICK_RATE (((FREQ / CFG_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CFG_HZ) #define LATCH ((CLOCK_TICK_RATE + CFG_HZ/2) / CFG_HZ) /* For divider */ struct _irq_handler { void *m_data; void (*m_func)( void *data); }; static struct _irq_handler IRQ_HANDLER[N_IRQS]; static volatile ulong timestamp; static void default_isr(void *data) { printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n", (int)data, *IXP425_ICIP, *IXP425_ICIH); } static int next_irq(void) { return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1); } static void timer_isr(void *data) { unsigned int *pTime = (unsigned int *)data; (*pTime)++; /* * Reset IRQ source */ *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; } ulong get_timer (ulong base) { return timestamp - base; } void reset_timer (void) { timestamp = 0; } #endif /* #ifdef CONFIG_USE_IRQ */ #ifdef CONFIG_USE_IRQ void do_irq (struct pt_regs *pt_regs) { int irq = next_irq(); IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); } #endif int interrupt_init (void) { #ifdef CONFIG_USE_IRQ int i; /* install default interrupt handlers */ for (i = 0; i < N_IRQS; i++) { IRQ_HANDLER[i].m_data = (void *)i; IRQ_HANDLER[i].m_func = default_isr; } /* install interrupt handler for timer */ IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)×tamp; IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr; /* setup the Timer counter value */ *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; /* configure interrupts for IRQ mode */ *IXP425_ICLR = 0x00000000; /* enable timer irq */ *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); #endif return (0); } |