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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | /* * (C) Copyright 2001 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ #ifndef _SPI_H_ #define _SPI_H_ /* Controller-specific definitions: */ /* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */ #ifdef CONFIG_MPC8XXX_SPI # ifndef CONFIG_HARD_SPI # define CONFIG_HARD_SPI # endif #endif /* SPI mode flags */ #define SPI_CPHA 0x01 /* clock phase */ #define SPI_CPOL 0x02 /* clock polarity */ #define SPI_MODE_0 (0|0) /* (original MicroWire) */ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) #define SPI_CS_HIGH 0x04 /* CS active high */ #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ #define SPI_3WIRE 0x10 /* SI/SO signals shared */ #define SPI_LOOP 0x20 /* loopback mode */ /* SPI transfer flags */ #define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ #define SPI_XFER_END 0x02 /* Deassert CS after transfer */ /*----------------------------------------------------------------------- * Representation of a SPI slave, i.e. what we're communicating with. * * Drivers are expected to extend this with controller-specific data. * * bus: ID of the bus that the slave is attached to. * cs: ID of the chip select connected to the slave. */ struct spi_slave { unsigned int bus; unsigned int cs; }; /*----------------------------------------------------------------------- * Initialization, must be called once on start up. * * TODO: I don't think we really need this. */ void spi_init(void); /*----------------------------------------------------------------------- * Set up communications parameters for a SPI slave. * * This must be called once for each slave. Note that this function * usually doesn't touch any actual hardware, it only initializes the * contents of spi_slave so that the hardware can be easily * initialized later. * * bus: Bus ID of the slave chip. * cs: Chip select ID of the slave chip on the specified bus. * max_hz: Maximum SCK rate in Hz. * mode: Clock polarity, clock phase and other parameters. * * Returns: A spi_slave reference that can be used in subsequent SPI * calls, or NULL if one or more of the parameters are not supported. */ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode); /*----------------------------------------------------------------------- * Free any memory associated with a SPI slave. * * slave: The SPI slave */ void spi_free_slave(struct spi_slave *slave); /*----------------------------------------------------------------------- * Claim the bus and prepare it for communication with a given slave. * * This must be called before doing any transfers with a SPI slave. It * will enable and initialize any SPI hardware as necessary, and make * sure that the SCK line is in the correct idle state. It is not * allowed to claim the same bus for several slaves without releasing * the bus in between. * * slave: The SPI slave * * Returns: 0 if the bus was claimed successfully, or a negative value * if it wasn't. */ int spi_claim_bus(struct spi_slave *slave); /*----------------------------------------------------------------------- * Release the SPI bus * * This must be called once for every call to spi_claim_bus() after * all transfers have finished. It may disable any SPI hardware as * appropriate. * * slave: The SPI slave */ void spi_release_bus(struct spi_slave *slave); /*----------------------------------------------------------------------- * SPI transfer * * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks * "bitlen" bits in the SPI MISO port. That's just the way SPI works. * * The source of the outgoing bits is the "dout" parameter and the * destination of the input bits is the "din" parameter. Note that "dout" * and "din" can point to the same memory location, in which case the * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). * * spi_xfer() interface: * slave: The SPI slave which will be sending/receiving the data. * bitlen: How many bits to write and read. * dout: Pointer to a string of bits to send out. The bits are * held in a byte array and are sent MSB first. * din: Pointer to a string of bits that will be filled in. * flags: A bitwise combination of SPI_XFER_* flags. * * Returns: 0 on success, not 0 on failure */ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags); /*----------------------------------------------------------------------- * Determine if a SPI chipselect is valid. * This function is provided by the board if the low-level SPI driver * needs it to determine if a given chipselect is actually valid. * * Returns: 1 if bus:cs identifies a valid chip on this board, 0 * otherwise. */ int spi_cs_is_valid(unsigned int bus, unsigned int cs); /*----------------------------------------------------------------------- * Activate a SPI chipselect. * This function is provided by the board code when using a driver * that can't control its chipselects automatically (e.g. * common/soft_spi.c). When called, it should activate the chip select * to the device identified by "slave". */ void spi_cs_activate(struct spi_slave *slave); /*----------------------------------------------------------------------- * Deactivate a SPI chipselect. * This function is provided by the board code when using a driver * that can't control its chipselects automatically (e.g. * common/soft_spi.c). When called, it should deactivate the chip * select to the device identified by "slave". */ void spi_cs_deactivate(struct spi_slave *slave); /*----------------------------------------------------------------------- * Write 8 bits, then read 8 bits. * slave: The SPI slave we're communicating with * byte: Byte to be written * * Returns: The value that was read, or a negative value on error. * * TODO: This function probably shouldn't be inlined. */ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) { unsigned char dout[2]; unsigned char din[2]; int ret; dout[0] = byte; dout[1] = 0; ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); return ret < 0 ? ret : din[1]; } #endif /* _SPI_H_ */ |