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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 | // SPDX-License-Identifier: GPL-2.0+ /* * Freescale MX28EVK board * * (C) Copyright 2011 Freescale Semiconductor, Inc. * * Author: Fabio Estevam <fabio.estevam@freescale.com> * * Based on m28evk.c: * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> * on behalf of DENX Software Engineering GmbH */ #include <common.h> #include <asm/gpio.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/iomux-mx28.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> #include <linux/mii.h> #include <miiphy.h> #include <netdev.h> #include <errno.h> DECLARE_GLOBAL_DATA_PTR; /* * Functions */ int board_early_init_f(void) { /* IO0 clock at 480MHz */ mxs_set_ioclk(MXC_IOCLK0, 480000); /* IO1 clock at 480MHz */ mxs_set_ioclk(MXC_IOCLK1, 480000); /* SSP0 clock at 96MHz */ mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); /* SSP2 clock at 160MHz */ mxs_set_sspclk(MXC_SSPCLK2, 160000, 0); #ifdef CONFIG_CMD_USB mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); mxs_iomux_setup_pad(MX28_PAD_AUART2_RX__GPIO_3_8 | MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL); gpio_direction_output(MX28_PAD_AUART2_RX__GPIO_3_8, 1); #endif /* Power on LCD */ gpio_direction_output(MX28_PAD_LCD_RESET__GPIO_3_30, 1); /* Set contrast to maximum */ gpio_direction_output(MX28_PAD_PWM2__GPIO_3_18, 1); return 0; } int dram_init(void) { return mxs_dram_init(); } int board_init(void) { /* Adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; return 0; } #ifdef CONFIG_CMD_MMC static int mx28evk_mmc_wp(int id) { if (id != 0) { printf("MXS MMC: Invalid card selected (card id = %d)\n", id); return 1; } return gpio_get_value(MX28_PAD_SSP1_SCK__GPIO_2_12); } int board_mmc_init(bd_t *bis) { /* Configure WP as input */ gpio_direction_input(MX28_PAD_SSP1_SCK__GPIO_2_12); /* Configure MMC0 Power Enable */ gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); return mxsmmc_initialize(bis, 0, mx28evk_mmc_wp, NULL); } #endif #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bis) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; struct eth_device *dev; int ret; ret = cpu_eth_init(bis); if (ret) return ret; /* MX28EVK uses ENET_CLK PAD to drive FEC clock */ writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN, &clkctrl_regs->hw_clkctrl_enet); /* Power-on FECs */ gpio_direction_output(MX28_PAD_SSP1_DATA3__GPIO_2_15, 0); /* Reset FEC PHYs */ gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0); udelay(200); gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1); ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE); if (ret) { puts("FEC MXS: Unable to init FEC0\n"); return ret; } ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE); if (ret) { puts("FEC MXS: Unable to init FEC1\n"); return ret; } dev = eth_get_dev_by_name("FEC0"); if (!dev) { puts("FEC MXS: Unable to get FEC0 device entry\n"); return -EINVAL; } dev = eth_get_dev_by_name("FEC1"); if (!dev) { puts("FEC MXS: Unable to get FEC1 device entry\n"); return -EINVAL; } return ret; } #endif |