Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 | CONFIG_ARM_GIC_BASE_ADDRESS CONFIG_AUTO_ZRELADDR CONFIG_BOARDDIR CONFIG_BOOTSCRIPT_ADDR CONFIG_BOOTSCRIPT_COPY_RAM CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_ADDR_DEVICE CONFIG_BS_ADDR_RAM CONFIG_BS_COPY_CMD CONFIG_BS_COPY_ENV CONFIG_BS_HDR_ADDR_DEVICE CONFIG_BS_HDR_ADDR_RAM CONFIG_BS_HDR_SIZE CONFIG_BS_SIZE CONFIG_CHAIN_BOOT_CMD CONFIG_DEFAULT CONFIG_DFU_ALT CONFIG_DFU_ALT_BOOT_EMMC CONFIG_DFU_ALT_BOOT_SD CONFIG_DFU_ALT_SYSTEM CONFIG_DFU_ENV_SETTINGS CONFIG_DM9000_BASE CONFIG_DM9000_BYTE_SWAPPED CONFIG_DM9000_DEBUG CONFIG_DM9000_NO_SROM CONFIG_DM9000_USE_16BIT CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR CONFIG_DSP_CLUSTER_START CONFIG_DWC_AHSATA_BASE_ADDR CONFIG_DWC_AHSATA_PORT_ID CONFIG_DW_ALTDESCRIPTOR CONFIG_DW_GMAC_DEFAULT_DMA_PBL CONFIG_DW_WDT_BASE CONFIG_DW_WDT_CLOCK_KHZ CONFIG_E1000_NO_NVM CONFIG_EFLASH_PROTSECTORS CONFIG_EHCI_DESC_BIG_ENDIAN CONFIG_EHCI_HCD_INIT_AFTER_RESET CONFIG_EHCI_MMIO_BIG_ENDIAN CONFIG_EHCI_MXS_PORT0 CONFIG_EHCI_MXS_PORT1 CONFIG_EMU CONFIG_ENABLE_36BIT_PHYS CONFIG_ENABLE_MMU CONFIG_ENV_FLAGS_LIST_STATIC CONFIG_ENV_IS_EMBEDDED CONFIG_ENV_MAX_ENTRIES CONFIG_ENV_MIN_ENTRIES CONFIG_ENV_RANGE CONFIG_ENV_REFLASH CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS CONFIG_ENV_SETTINGS_NAND_V1 CONFIG_ENV_SETTINGS_NAND_V2 CONFIG_ENV_SETTINGS_V1 CONFIG_ENV_SETTINGS_V2 CONFIG_ENV_SROM_BANK CONFIG_ENV_TOTAL_SIZE CONFIG_ENV_VERSION CONFIG_ESBC_ADDR_64BIT CONFIG_ESBC_HDR_LS CONFIG_ESDHC_DETECT_QUIRK CONFIG_ESDHC_HC_BLK_ADDR CONFIG_ESPRESSO7420 CONFIG_ET1100_BASE CONFIG_ETHBASE CONFIG_EXTRA_CLOCK CONFIG_EXTRA_ENV CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_COMMON CONFIG_EXYNOS4 CONFIG_EXYNOS4210 CONFIG_EXYNOS5 CONFIG_EXYNOS5250 CONFIG_EXYNOS5420 CONFIG_EXYNOS5_DT CONFIG_EXYNOS_ACE_SHA CONFIG_EXYNOS_DP CONFIG_EXYNOS_FB CONFIG_EXYNOS_MIPI_DSIM CONFIG_EXYNOS_RELOCATE_CODE_BASE CONFIG_EXYNOS_SPL CONFIG_EXYNOS_TMU CONFIG_FACTORYSET CONFIG_FB_ADDR CONFIG_FDTADDR CONFIG_FDTFILE CONFIG_FEC_ENET_DEV CONFIG_FEC_FIXED_SPEED CONFIG_FEC_MXC_PHYADDR CONFIG_FIXED_SDHCI_ALIGNED_BUFFER CONFIG_FLASH_BR_PRELIM CONFIG_FLASH_CFI_LEGACY CONFIG_FLASH_OR_PRELIM CONFIG_FLASH_SECTOR_SIZE CONFIG_FLASH_SHOW_PROGRESS CONFIG_FLASH_SPANSION_S29WS_N CONFIG_FLASH_VERIFY CONFIG_FM_PLAT_CLK_DIV CONFIG_FPGA_COUNT CONFIG_FPGA_STRATIX_V CONFIG_FSL_CADMUS CONFIG_FSL_CORENET CONFIG_FSL_CPLD CONFIG_FSL_DEVICE_DISABLE CONFIG_FSL_DSPI1 CONFIG_FSL_ESDHC_PIN_MUX CONFIG_FSL_FIXED_MMC_LOCATION CONFIG_FSL_FM_10GEC_REGULAR_NOTATION CONFIG_FSL_IIM CONFIG_FSL_ISBC_KEY_EXT CONFIG_FSL_LBC CONFIG_FSL_MEMAC CONFIG_FSL_NGPIXIS CONFIG_FSL_PMIC_BITLEN CONFIG_FSL_PMIC_BUS CONFIG_FSL_PMIC_CLK CONFIG_FSL_PMIC_CS CONFIG_FSL_PMIC_MODE CONFIG_FSL_SATA_V2 CONFIG_FSL_SDHC_V2_3 CONFIG_FSL_SERDES CONFIG_FSL_SERDES1 CONFIG_FSL_SERDES2 CONFIG_FSL_SGMII_RISER CONFIG_FTMAC100_BASE CONFIG_FTRTC010_EXTCLK CONFIG_FTRTC010_PCLK CONFIG_GATEWAYIP CONFIG_GLOBAL_TIMER CONFIG_GMII CONFIG_G_DNL_THOR_PRODUCT_NUM CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_UMS_PRODUCT_NUM CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_HAS_FSL_DR_USB CONFIG_HAS_FSL_MPH_USB CONFIG_HDMI_ENCODER_I2C_ADDR CONFIG_HETROGENOUS_CLUSTERS CONFIG_HIDE_LOGO_VERSION CONFIG_HIKEY_GPIO CONFIG_HOSTNAME CONFIG_HPS_ALTERAGRP_DBGATCLK CONFIG_HPS_ALTERAGRP_MAINCLK CONFIG_HPS_ALTERAGRP_MPUCLK CONFIG_HPS_CLK_CAN0_HZ CONFIG_HPS_CLK_CAN1_HZ CONFIG_HPS_CLK_EMAC0_HZ CONFIG_HPS_CLK_EMAC1_HZ CONFIG_HPS_CLK_F2S_PER_REF_HZ CONFIG_HPS_CLK_F2S_SDR_REF_HZ CONFIG_HPS_CLK_GPIODB_HZ CONFIG_HPS_CLK_L4_MP_HZ CONFIG_HPS_CLK_L4_SP_HZ CONFIG_HPS_CLK_MAINVCO_HZ CONFIG_HPS_CLK_NAND_HZ CONFIG_HPS_CLK_OSC1_HZ CONFIG_HPS_CLK_OSC2_HZ CONFIG_HPS_CLK_PERVCO_HZ CONFIG_HPS_CLK_QSPI_HZ CONFIG_HPS_CLK_SDMMC_HZ CONFIG_HPS_CLK_SDRVCO_HZ CONFIG_HPS_CLK_SPIM_HZ CONFIG_HPS_CLK_USBCLK_HZ CONFIG_HPS_DBCTRL_STAYOSC1 CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK CONFIG_HPS_MAINPLLGRP_VCO_DENOM CONFIG_HPS_MAINPLLGRP_VCO_NUMER CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK CONFIG_HPS_PERPLLGRP_DIV_USBCLK CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT CONFIG_HPS_PERPLLGRP_SRC_NAND CONFIG_HPS_PERPLLGRP_SRC_QSPI CONFIG_HPS_PERPLLGRP_SRC_SDMMC CONFIG_HPS_PERPLLGRP_VCO_DENOM CONFIG_HPS_PERPLLGRP_VCO_NUMER CONFIG_HPS_PERPLLGRP_VCO_PSRC CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE CONFIG_HPS_SDRPLLGRP_VCO_DENOM CONFIG_HPS_SDRPLLGRP_VCO_NUMER CONFIG_HPS_SDRPLLGRP_VCO_SSRC CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0 CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32 CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0 CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4 CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36 CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46 CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0 CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP CONFIG_HSMMC2_8BIT CONFIG_HUSH_INIT_VAR CONFIG_HWCONFIG CONFIG_HW_ENV_SETTINGS CONFIG_I2C_ENV_EEPROM_BUS CONFIG_I2C_MULTI_BUS CONFIG_I2C_MVTWSI CONFIG_I2C_MVTWSI_BASE CONFIG_I2C_MVTWSI_BASE0 CONFIG_I2C_MVTWSI_BASE1 CONFIG_I2C_RTC_ADDR CONFIG_ICS307_REFCLK_HZ CONFIG_IDE_PREINIT CONFIG_IMX CONFIG_IMX6_PWM_PER_CLK CONFIG_IMX_HDMI CONFIG_IMX_VIDEO_SKIP CONFIG_INTERRUPTS CONFIG_IODELAY_RECALIBRATION CONFIG_IOMUX_LPSR CONFIG_IOMUX_SHARE_CONF_REG CONFIG_IO_TRACE CONFIG_IPADDR CONFIG_IRAM_BASE CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_IRAM_STACK CONFIG_IRAM_TOP CONFIG_KEY_REVOCATION CONFIG_KIRKWOOD_EGIGA_INIT CONFIG_KIRKWOOD_PCIE_INIT CONFIG_KIRKWOOD_RGMII_PAD_1V8 CONFIG_KM_BOARD_EXTRA_ENV CONFIG_KM_DEF_ARCH CONFIG_KM_DEF_BOOT_ARGS_CPU CONFIG_KM_DEF_ENV CONFIG_KM_DEF_ENV_BOOTARGS CONFIG_KM_DEF_ENV_BOOTPARAMS CONFIG_KM_DEF_ENV_BOOTTARGETS CONFIG_KM_DEF_ENV_CONSTANTS CONFIG_KM_DEF_ENV_CPU CONFIG_KM_DEF_ENV_FLASH_BOOT CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI CONFIG_KM_DISABLE_PCIE CONFIG_KM_ECC_MODE CONFIG_KM_NEW_ENV CONFIG_KM_ROOTFSSIZE CONFIG_KM_UBI_LINUX_MTD CONFIG_KM_UBI_PARTITION_NAME_APP CONFIG_KM_UBI_PARTITION_NAME_BOOT CONFIG_KM_UBI_PART_BOOT_OPTS CONFIG_KM_UIMAGE_NAME CONFIG_KM_UPDATE_UBOOT CONFIG_KSNET_CPSW_NUM_PORTS CONFIG_KSNET_MAC_ID_BASE CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE CONFIG_KSNET_NETCP_BASE CONFIG_KSNET_NETCP_V1_0 CONFIG_KSNET_NETCP_V1_5 CONFIG_KSNET_SERDES_LANES_PER_SGMII CONFIG_KSNET_SERDES_SGMII2_BASE CONFIG_KSNET_SERDES_SGMII_BASE CONFIG_L1_INIT_RAM CONFIG_L2_CACHE CONFIG_LAYERSCAPE_NS_ACCESS CONFIG_LBA48 CONFIG_LCD_ALIGNMENT CONFIG_LCD_MENU CONFIG_LD9040 CONFIG_LEGACY_BOOTCMD_ENV CONFIG_LOADS_ECHO CONFIG_LOWPOWER_ADDR CONFIG_LOWPOWER_FLAG CONFIG_LPC32XX_HSUART CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY CONFIG_LPC32XX_NAND_MLC_NAND_TA CONFIG_LPC32XX_NAND_MLC_RD_HIGH CONFIG_LPC32XX_NAND_MLC_RD_LOW CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY CONFIG_LPC32XX_NAND_MLC_WR_HIGH CONFIG_LPC32XX_NAND_MLC_WR_LOW CONFIG_LPC32XX_NAND_SLC_RDR_CLKS CONFIG_LPC32XX_NAND_SLC_RHOLD CONFIG_LPC32XX_NAND_SLC_RSETUP CONFIG_LPC32XX_NAND_SLC_RWIDTH CONFIG_LPC32XX_NAND_SLC_WDR_CLKS CONFIG_LPC32XX_NAND_SLC_WHOLD CONFIG_LPC32XX_NAND_SLC_WSETUP CONFIG_LPC32XX_NAND_SLC_WWIDTH CONFIG_LS102XA_STREAM_ID CONFIG_MACB_SEARCH_PHY CONFIG_MALLOC_F_ADDR CONFIG_MALTA CONFIG_MAX_DSP_CPUS CONFIG_MAX_MEM_MAPPED CONFIG_MAX_RAM_BANK_SIZE CONFIG_MEMSIZE_IN_BYTES CONFIG_MEM_INIT_VALUE CONFIG_MFG_ENV_SETTINGS CONFIG_MII_DEFAULT_TSEC CONFIG_MISC_COMMON CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MIU_2BIT_INTERLEAVED CONFIG_MMC_DEFAULT_DEV CONFIG_MMC_SUNXI_SLOT CONFIG_MONITOR_IS_IN_RAM CONFIG_MPC85XX_FEC CONFIG_MPC85XX_FEC_NAME CONFIG_MTD_NAND_VERIFY_WRITE CONFIG_MTD_PARTITION CONFIG_MVGBE_PORTS CONFIG_MVS CONFIG_MX27 CONFIG_MX27_CLK32 CONFIG_MXC_GPT_HCLK CONFIG_MXC_NAND_HWECC CONFIG_MXC_NAND_IP_REGS_BASE CONFIG_MXC_NAND_REGS_BASE CONFIG_MXC_UART_BASE CONFIG_MXC_USB_FLAGS CONFIG_MXC_USB_PORT CONFIG_MXC_USB_PORTSC CONFIG_MXS CONFIG_MXS_OCOTP CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC CONFIG_NAND_CS_INIT CONFIG_NAND_ECC_BCH CONFIG_NAND_KIRKWOOD CONFIG_NAND_KMETER1 CONFIG_NAND_OMAP_GPMC_WSCFG CONFIG_NAND_SECBOOT CONFIG_NAND_SPL CONFIG_NETDEV CONFIG_NETMASK CONFIG_NEVER_ASSERT_ODT_TO_CPU CONFIG_NOBQFMAN CONFIG_NORBOOT CONFIG_NS16550_MIN_FUNCTIONS CONFIG_NUM_DSP_CPUS CONFIG_ODROID_REV_AIN CONFIG_ORIGEN CONFIG_OTHBOOTARGS CONFIG_OVERWRITE_ETHADDR_ONCE CONFIG_PALMAS_POWER CONFIG_PCA953X CONFIG_PCI1 CONFIG_PCI2 CONFIG_PCIE1 CONFIG_PCIE2 CONFIG_PCIE3 CONFIG_PCIE4 CONFIG_PCIE_IMX CONFIG_PCIE_IMX_PERST_GPIO CONFIG_PCIE_IMX_POWER_GPIO CONFIG_PCI_CLK_FREQ CONFIG_PCI_CONFIG_HOST_BRIDGE CONFIG_PCI_GT64120 CONFIG_PCI_IO_BUS CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_SIZE CONFIG_PCI_MEM_BUS CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_SIZE CONFIG_PCI_MSC01 CONFIG_PCI_OHCI CONFIG_PCI_PREF_BUS CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_SIZE CONFIG_PCI_SCAN_SHOW CONFIG_PEN_ADDR_BIG_ENDIAN CONFIG_PHY_BASE_ADR CONFIG_PHY_ET1011C_TX_CLK_FIX CONFIG_PHY_ID CONFIG_PHY_INTERFACE_MODE CONFIG_PHY_IRAM_BASE CONFIG_PL011_CLOCK CONFIG_PL01x_PORTS CONFIG_PM CONFIG_PMC_BR_PRELIM CONFIG_PMC_OR_PRELIM CONFIG_PME_PLAT_CLK_DIV CONFIG_POST CONFIG_POSTBOOTMENU CONFIG_POST_EXTERNAL_WORD_FUNCS CONFIG_POST_SKIP_ENV_FLAGS CONFIG_POWER_FSL CONFIG_POWER_FSL_MC13892 CONFIG_POWER_HI6553 CONFIG_POWER_LTC3676 CONFIG_POWER_LTC3676_I2C_ADDR CONFIG_POWER_PFUZE100 CONFIG_POWER_PFUZE100_I2C_ADDR CONFIG_POWER_PFUZE3000 CONFIG_POWER_PFUZE3000_I2C_ADDR CONFIG_POWER_SPI CONFIG_POWER_TPS62362 CONFIG_POWER_TPS65090_EC CONFIG_POWER_TPS65218 CONFIG_POWER_TPS65910 CONFIG_PPC_CLUSTER_START CONFIG_PPC_SPINTABLE_COMPATIBLE CONFIG_PRAM CONFIG_PSRAM_SCFG CONFIG_PWM CONFIG_PXA_VGA CONFIG_QBMAN_CLK_DIV CONFIG_RAMBOOT_NAND CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE CONFIG_RAMDISK_ADDR CONFIG_RD_LVL CONFIG_RESET_VECTOR_ADDRESS CONFIG_RESTORE_FLASH CONFIG_ROCKCHIP_SDHCI_MAX_FREQ CONFIG_ROOTPATH CONFIG_RTC_DS1337 CONFIG_RTC_DS1337_NOOSC CONFIG_RTC_DS1338 CONFIG_RTC_DS1374 CONFIG_RTC_DS3231 CONFIG_RTC_MC13XXX CONFIG_RTC_MCFRRTC CONFIG_RTC_MXS CONFIG_RTC_PT7C4338 CONFIG_S5P CONFIG_S5PC100 CONFIG_S5PC110 CONFIG_S5P_PA_SYSRAM CONFIG_SAMA5D3_LCD_BASE CONFIG_SAMSUNG CONFIG_SAMSUNG_ONENAND CONFIG_SANDBOX_ARCH CONFIG_SANDBOX_SDL CONFIG_SANDBOX_SPI_MAX_BUS CONFIG_SANDBOX_SPI_MAX_CS CONFIG_SAR2_REG CONFIG_SAR_REG CONFIG_SATA1 CONFIG_SATA2 CONFIG_SCIF_A CONFIG_SCSI_DEV_LIST CONFIG_SC_TIMER_CLK CONFIG_SDRAM_OFFSET_FOR_RT CONFIG_SECBOOT CONFIG_SERIAL_BOOT CONFIG_SERIAL_SOFTWARE_FIFO CONFIG_SERVERIP CONFIG_SETUP_INITRD_TAG CONFIG_SET_BOOTARGS CONFIG_SET_DFU_ALT_BUF_LEN CONFIG_SH73A0 CONFIG_SH7751_PCI CONFIG_SH_ETHER_ALIGNE_SIZE CONFIG_SH_ETHER_BASE_ADDR CONFIG_SH_ETHER_CACHE_INVALIDATE CONFIG_SH_ETHER_CACHE_WRITEBACK CONFIG_SH_ETHER_PHY_ADDR CONFIG_SH_ETHER_PHY_MODE CONFIG_SH_ETHER_SH7734_MII CONFIG_SH_ETHER_USE_PORT CONFIG_SH_GPIO_PFC CONFIG_SH_QSPI_BASE CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION CONFIG_SLIC CONFIG_SMC91111 CONFIG_SMC91111_BASE CONFIG_SMC91111_EXT_PHY CONFIG_SMC_USE_32_BIT CONFIG_SMDK5420 CONFIG_SMP_PEN_ADDR CONFIG_SMSC_LPC47M CONFIG_SMSC_SIO1007 CONFIG_SOCRATES CONFIG_SOFT_I2C_READ_REPEATED_START CONFIG_SPD_EEPROM CONFIG_SPI_ADDR CONFIG_SPI_BOOTING CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET CONFIG_SPL_BOARD_LOAD_IMAGE CONFIG_SPL_BOOTROM_SAVE CONFIG_SPL_BOOT_DEVICE CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_CMT CONFIG_SPL_CMT_DEBUG CONFIG_SPL_COMMON_INIT_DDR CONFIG_SPL_FLUSH_IMAGE CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_MAX_FOOTPRINT CONFIG_SPL_MAX_SIZE CONFIG_SPL_NAND_INIT CONFIG_SPL_NAND_MINIMAL CONFIG_SPL_NAND_RAW_ONLY CONFIG_SPL_NAND_SOFTECC CONFIG_SPL_PAD_TO CONFIG_SPL_PBL_PAD CONFIG_SPL_RELOC_MALLOC_ADDR CONFIG_SPL_RELOC_MALLOC_SIZE CONFIG_SPL_RELOC_STACK CONFIG_SPL_RELOC_TEXT_BASE CONFIG_SPL_SATA_BOOT_DEVICE CONFIG_SPL_SIZE CONFIG_SPL_SKIP_RELOCATE CONFIG_SPL_SPI_FLASH_MINIMAL CONFIG_SPL_STACK CONFIG_SPL_STACK_ADDR CONFIG_SPL_STACK_SIZE CONFIG_SPL_START_S_PATH CONFIG_SPL_TARGET CONFIG_SRAM_BASE CONFIG_SRAM_SIZE CONFIG_SRIO1 CONFIG_SRIO2 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE CONFIG_SRIO_PCIE_BOOT_MASTER CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE CONFIG_STACKBASE CONFIG_STANDALONE_LOAD_ADDR CONFIG_STD_DEVICES_SETTINGS CONFIG_SYS_64BIT CONFIG_SYS_64BIT_LBA CONFIG_SYS_83XX_DDR_USES_CS0 CONFIG_SYS_AMASK0 CONFIG_SYS_AMASK1 CONFIG_SYS_AMASK1_FINAL CONFIG_SYS_AMASK2 CONFIG_SYS_AMASK2_FINAL CONFIG_SYS_AMASK3 CONFIG_SYS_AMASK4 CONFIG_SYS_AMASK6 CONFIG_SYS_AMASK7 CONFIG_SYS_AT91_MAIN_CLOCK CONFIG_SYS_AT91_PLLA CONFIG_SYS_AT91_PLLB CONFIG_SYS_AT91_SLOW_CLOCK CONFIG_SYS_AUTOLOAD CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_AUXCORE_BOOTDATA CONFIG_SYS_BARGSIZE CONFIG_SYS_BAUDRATE_TABLE CONFIG_SYS_BFTIC3_BASE CONFIG_SYS_BFTIC3_SIZE CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_CENA_SIZE CONFIG_SYS_BMAN_CINH_BASE CONFIG_SYS_BMAN_CINH_SIZE CONFIG_SYS_BMAN_MEM_BASE CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_SIZE CONFIG_SYS_BMAN_NUM_PORTALS CONFIG_SYS_BMAN_SP_CENA_SIZE CONFIG_SYS_BMAN_SP_CINH_SIZE CONFIG_SYS_BMAN_SWP_ISDR_REG CONFIG_SYS_BOOK3E_HV CONFIG_SYS_BOOTCOUNT_BE CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTMAPSZ CONFIG_SYS_BOOTM_LEN CONFIG_SYS_BOOTPARAMS_LEN CONFIG_SYS_BOOT_BLOCK CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_CACHE_ACR0 CONFIG_SYS_CACHE_ACR1 CONFIG_SYS_CACHE_ACR2 CONFIG_SYS_CACHE_DCACR CONFIG_SYS_CACHE_ICACR CONFIG_SYS_CACHE_STASHING CONFIG_SYS_CBSIZE CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_HIGH CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSR_DO_NOT_RELOCATE CONFIG_SYS_CFI_FLASH_STATUS_POLL CONFIG_SYS_CLK CONFIG_SYS_CLKTL_CBCDR CONFIG_SYS_CORE_SRAM CONFIG_SYS_CORE_SRAM_SIZE CONFIG_SYS_CPC_REINIT_F CONFIG_SYS_CPLD_AMASK CONFIG_SYS_CPLD_BASE CONFIG_SYS_CPLD_BASE_PHYS CONFIG_SYS_CPLD_CSOR CONFIG_SYS_CPLD_CSPR CONFIG_SYS_CPLD_CSPR_EXT CONFIG_SYS_CPLD_FTIM0 CONFIG_SYS_CPLD_FTIM1 CONFIG_SYS_CPLD_FTIM2 CONFIG_SYS_CPLD_FTIM3 CONFIG_SYS_CPLD_SIZE CONFIG_SYS_CPRI CONFIG_SYS_CPRI_CLK CONFIG_SYS_CPUSPEED CONFIG_SYS_CPU_CLK CONFIG_SYS_CS0_BASE CONFIG_SYS_CS0_CTRL CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_CS0_MASK CONFIG_SYS_CS0_SIZE CONFIG_SYS_CS1_BASE CONFIG_SYS_CS1_CTRL CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_CS1_MASK CONFIG_SYS_CS2_BASE CONFIG_SYS_CS2_CTRL CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CS2_MASK CONFIG_SYS_CS3_BASE CONFIG_SYS_CS3_CTRL CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_CS3_MASK CONFIG_SYS_CS4_FTIM0 CONFIG_SYS_CS4_FTIM1 CONFIG_SYS_CS4_FTIM2 CONFIG_SYS_CS4_FTIM3 CONFIG_SYS_CS6_FTIM0 CONFIG_SYS_CS6_FTIM1 CONFIG_SYS_CS6_FTIM2 CONFIG_SYS_CS6_FTIM3 CONFIG_SYS_CS7_FTIM0 CONFIG_SYS_CS7_FTIM1 CONFIG_SYS_CS7_FTIM2 CONFIG_SYS_CS7_FTIM3 CONFIG_SYS_CSOR0 CONFIG_SYS_CSOR1 CONFIG_SYS_CSOR2 CONFIG_SYS_CSOR3 CONFIG_SYS_CSOR4 CONFIG_SYS_CSOR6 CONFIG_SYS_CSOR7 CONFIG_SYS_CSPR0 CONFIG_SYS_CSPR0_EXT CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_CSPR1 CONFIG_SYS_CSPR1_EXT CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_CSPR2 CONFIG_SYS_CSPR2_EXT CONFIG_SYS_CSPR2_FINAL CONFIG_SYS_CSPR3 CONFIG_SYS_CSPR3_EXT CONFIG_SYS_CSPR3_FINAL CONFIG_SYS_CSPR4 CONFIG_SYS_CSPR4_EXT CONFIG_SYS_CSPR6 CONFIG_SYS_CSPR6_EXT CONFIG_SYS_CSPR7 CONFIG_SYS_CSPR7_EXT CONFIG_SYS_DA850_DDR2_DDRPHYCR CONFIG_SYS_DA850_DDR2_PBBPR CONFIG_SYS_DA850_DDR2_SDBCR CONFIG_SYS_DA850_DDR2_SDBCR2 CONFIG_SYS_DA850_DDR2_SDRCR CONFIG_SYS_DA850_DDR2_SDTIMR CONFIG_SYS_DA850_DDR2_SDTIMR2 CONFIG_SYS_DA850_PLL0_PLLM CONFIG_SYS_DA850_PLL1_PLLM CONFIG_SYS_DA850_SYSCFG_SUSPSRC CONFIG_SYS_DAVINCI_I2C_SLAVE CONFIG_SYS_DAVINCI_I2C_SLAVE1 CONFIG_SYS_DAVINCI_I2C_SLAVE2 CONFIG_SYS_DAVINCI_I2C_SPEED CONFIG_SYS_DAVINCI_I2C_SPEED1 CONFIG_SYS_DAVINCI_I2C_SPEED2 CONFIG_SYS_DCACHE_INV CONFIG_SYS_DCSRBAR CONFIG_SYS_DCSRBAR_PHYS CONFIG_SYS_DCSR_COP_CCP_ADDR CONFIG_SYS_DCSR_DCFG_ADDR CONFIG_SYS_DCSR_DCFG_OFFSET CONFIG_SYS_DCU_ADDR CONFIG_SYS_DDRCDR CONFIG_SYS_DDRCDR_VALUE CONFIG_SYS_DDRUA CONFIG_SYS_DDR_BLOCK1_SIZE CONFIG_SYS_DDR_BLOCK2_BASE CONFIG_SYS_DDR_CLKSEL CONFIG_SYS_DDR_CLK_CNTL CONFIG_SYS_DDR_CLK_CONTROL CONFIG_SYS_DDR_CLK_CTRL CONFIG_SYS_DDR_CLK_CTRL_667 CONFIG_SYS_DDR_CLK_CTRL_800 CONFIG_SYS_DDR_CONFIG CONFIG_SYS_DDR_CONFIG_2 CONFIG_SYS_DDR_CONFIG_256 CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_2 CONFIG_SYS_DDR_CS0_BNDS CONFIG_SYS_DDR_CS0_CONFIG CONFIG_SYS_DDR_CS0_CONFIG_2 CONFIG_SYS_DDR_CS1_BNDS CONFIG_SYS_DDR_CS1_CONFIG CONFIG_SYS_DDR_CS1_CONFIG_2 CONFIG_SYS_DDR_DATA_INIT CONFIG_SYS_DDR_INIT_ADDR CONFIG_SYS_DDR_INIT_EXT_ADDR CONFIG_SYS_DDR_INTERVAL CONFIG_SYS_DDR_INTERVAL_667 CONFIG_SYS_DDR_INTERVAL_800 CONFIG_SYS_DDR_MODE CONFIG_SYS_DDR_MODE2 CONFIG_SYS_DDR_MODE_1 CONFIG_SYS_DDR_MODE_1_667 CONFIG_SYS_DDR_MODE_1_800 CONFIG_SYS_DDR_MODE_2 CONFIG_SYS_DDR_MODE_2_667 CONFIG_SYS_DDR_MODE_2_800 CONFIG_SYS_DDR_MODE_CONTROL CONFIG_SYS_DDR_RAW_TIMING CONFIG_SYS_DDR_RCW_1 CONFIG_SYS_DDR_RCW_2 CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_CFG CONFIG_SYS_DDR_SDRAM_CFG2 CONFIG_SYS_DDR_SDRAM_CLK_CNTL CONFIG_SYS_DDR_SIZE CONFIG_SYS_DDR_SR_CNTR CONFIG_SYS_DDR_TIMING_0 CONFIG_SYS_DDR_TIMING_0_667 CONFIG_SYS_DDR_TIMING_0_800 CONFIG_SYS_DDR_TIMING_1 CONFIG_SYS_DDR_TIMING_1_667 CONFIG_SYS_DDR_TIMING_1_800 CONFIG_SYS_DDR_TIMING_2 CONFIG_SYS_DDR_TIMING_2_667 CONFIG_SYS_DDR_TIMING_2_800 CONFIG_SYS_DDR_TIMING_3 CONFIG_SYS_DDR_TIMING_3_667 CONFIG_SYS_DDR_TIMING_3_800 CONFIG_SYS_DDR_TIMING_4 CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_WRLVL_CONTROL CONFIG_SYS_DDR_WRLVL_CONTROL_667 CONFIG_SYS_DDR_WRLVL_CONTROL_800 CONFIG_SYS_DDR_ZQ_CONTROL CONFIG_SYS_DEBUG CONFIG_SYS_DEBUG_SERVER_FW_ADDR CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS CONFIG_SYS_DIALOG_PMIC_I2C_ADDR CONFIG_SYS_DIRECT_FLASH_TFTP CONFIG_SYS_DISCOVER_PHY CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME CONFIG_SYS_DPAA_RMAN CONFIG_SYS_DRAM_SIZE CONFIG_SYS_DRAM_TEST CONFIG_SYS_DSPI_CTAR0 CONFIG_SYS_DSPI_CTAR1 CONFIG_SYS_DSPI_CTAR2 CONFIG_SYS_DSPI_CTAR3 CONFIG_SYS_DV_NOR_BOOT_CFG CONFIG_SYS_EEPROM_BUS_NUM CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE CONFIG_SYS_EEPROM_WREN CONFIG_SYS_EHCI_USB1_ADDR CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS CONFIG_SYS_ENET_BD_BASE CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_ETHOC_BASE CONFIG_SYS_ETHOC_BUFFER_ADDR CONFIG_SYS_ETVPE_CLK CONFIG_SYS_EXCEPTION_VECTORS_HIGH CONFIG_SYS_FAST_CLK CONFIG_SYS_FDT_BASE CONFIG_SYS_FDT_PAD CONFIG_SYS_FECI2C CONFIG_SYS_FEC_BUF_USE_SRAM CONFIG_SYS_FLASH0 CONFIG_SYS_FLASH1 CONFIG_SYS_FLASH1_BASE_PHYS CONFIG_SYS_FLASH1_BASE_PHYS_EARLY CONFIG_SYS_FLASH_BANKS_LIST CONFIG_SYS_FLASH_BANKS_SIZES CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH_BASE0 CONFIG_SYS_FLASH_BASE1 CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE_PHYS_EARLY CONFIG_SYS_FLASH_BR_PRELIM CONFIG_SYS_FLASH_CFI_NONBLOCK CONFIG_SYS_FLASH_CFI_WIDTH CONFIG_SYS_FLASH_CHECKSUM CONFIG_SYS_FLASH_EMPTY_INFO CONFIG_SYS_FLASH_ERASE_TOUT CONFIG_SYS_FLASH_LOCK_TOUT CONFIG_SYS_FLASH_OR_PRELIM CONFIG_SYS_FLASH_PARMSECT_SZ CONFIG_SYS_FLASH_QUIET_TEST CONFIG_SYS_FLASH_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH_UNLOCK_TOUT CONFIG_SYS_FLASH_WRITE_TOUT CONFIG_SYS_FM1_10GEC1_PHY_ADDR CONFIG_SYS_FM1_CLK CONFIG_SYS_FM1_DTSEC1_PHY_ADDR CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC2_PHY_ADDR CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC3_PHY_ADDR CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC4_PHY_ADDR CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC5_PHY_ADDR CONFIG_SYS_FM1_QSGMII11_PHY_ADDR CONFIG_SYS_FM1_QSGMII21_PHY_ADDR CONFIG_SYS_FM2_10GEC1_PHY_ADDR CONFIG_SYS_FM2_CLK CONFIG_SYS_FM2_DTSEC1_PHY_ADDR CONFIG_SYS_FM2_DTSEC2_PHY_ADDR CONFIG_SYS_FM2_DTSEC3_PHY_ADDR CONFIG_SYS_FM2_DTSEC4_PHY_ADDR CONFIG_SYS_FMAN_V3 CONFIG_SYS_FM_MURAM_SIZE CONFIG_SYS_FPGAREG_DATE CONFIG_SYS_FPGAREG_DIPSW CONFIG_SYS_FPGAREG_FREQ CONFIG_SYS_FPGAREG_RESET CONFIG_SYS_FPGAREG_RESET_CODE CONFIG_SYS_FPGA_AMASK CONFIG_SYS_FPGA_BASE CONFIG_SYS_FPGA_CSOR CONFIG_SYS_FPGA_CSPR CONFIG_SYS_FPGA_CSPR_EXT CONFIG_SYS_FPGA_FTIM0 CONFIG_SYS_FPGA_FTIM1 CONFIG_SYS_FPGA_FTIM2 CONFIG_SYS_FPGA_FTIM3 CONFIG_SYS_FPGA_PROG_FEEDBACK CONFIG_SYS_FPGA_SIZE CONFIG_SYS_FPGA_WAIT CONFIG_SYS_FSL_BMAN_ADDR CONFIG_SYS_FSL_BMAN_OFFSET CONFIG_SYS_FSL_CCSR_GUR_BE CONFIG_SYS_FSL_CCSR_GUR_LE CONFIG_SYS_FSL_CCSR_SCFG_BE CONFIG_SYS_FSL_CCSR_SCFG_LE CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR CONFIG_SYS_FSL_CLK_ADDR CONFIG_SYS_FSL_CLUSTER_1_L2 CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET CONFIG_SYS_FSL_CLUSTER_CLOCKS CONFIG_SYS_FSL_CORENET_CCM_ADDR CONFIG_SYS_FSL_CORENET_CCM_OFFSET CONFIG_SYS_FSL_CORENET_CLK_ADDR CONFIG_SYS_FSL_CORENET_CLK_OFFSET CONFIG_SYS_FSL_CORENET_PMAN CONFIG_SYS_FSL_CORENET_PMAN1_OFFSET CONFIG_SYS_FSL_CORENET_PMAN2_OFFSET CONFIG_SYS_FSL_CORENET_PMAN3_OFFSET CONFIG_SYS_FSL_CORENET_PME_ADDR CONFIG_SYS_FSL_CORENET_PME_OFFSET CONFIG_SYS_FSL_CORENET_RCPM_ADDR CONFIG_SYS_FSL_CORENET_RCPM_OFFSET CONFIG_SYS_FSL_CORENET_RMAN_ADDR CONFIG_SYS_FSL_CORENET_RMAN_OFFSET CONFIG_SYS_FSL_CORENET_SERDES2_ADDR CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET CONFIG_SYS_FSL_CORENET_SERDES3_ADDR CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET CONFIG_SYS_FSL_CORENET_SERDES4_ADDR CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET CONFIG_SYS_FSL_CORENET_SERDES_ADDR CONFIG_SYS_FSL_CORENET_SERDES_OFFSET CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY CONFIG_SYS_FSL_CORES_PER_CLUSTER CONFIG_SYS_FSL_CPC CONFIG_SYS_FSL_CPC_ADDR CONFIG_SYS_FSL_CPC_OFFSET CONFIG_SYS_FSL_CSU_ADDR CONFIG_SYS_FSL_DCFG_ADDR CONFIG_SYS_FSL_DCSR_DDR2_ADDR CONFIG_SYS_FSL_DCSR_DDR3_ADDR CONFIG_SYS_FSL_DCSR_DDR4_ADDR CONFIG_SYS_FSL_DCSR_DDR_ADDR CONFIG_SYS_FSL_DDR2_ADDR CONFIG_SYS_FSL_DDR3_ADDR CONFIG_SYS_FSL_DDR_ADDR CONFIG_SYS_FSL_DDR_EMU CONFIG_SYS_FSL_DDR_INTLV_256B CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY CONFIG_SYS_FSL_DSPI_BE CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET CONFIG_SYS_FSL_DSP_DDR_ADDR CONFIG_SYS_FSL_DSP_M2_RAM_ADDR CONFIG_SYS_FSL_DSP_M3_RAM_ADDR CONFIG_SYS_FSL_ERRATUM_A008751 CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_FSL_ESDHC_BE CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE CONFIG_SYS_FSL_ESDHC_LE CONFIG_SYS_FSL_ESDHC_NUM CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK CONFIG_SYS_FSL_FM CONFIG_SYS_FSL_FM1_ADDR CONFIG_SYS_FSL_FM1_DTSEC1_ADDR CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET CONFIG_SYS_FSL_FM1_OFFSET CONFIG_SYS_FSL_FM1_RX0_10G_OFFSET CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET CONFIG_SYS_FSL_FM1_RX1_10G_OFFSET CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET CONFIG_SYS_FSL_FM2_ADDR CONFIG_SYS_FSL_FM2_OFFSET CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET CONFIG_SYS_FSL_FM2_RX0_1G_OFFSET CONFIG_SYS_FSL_FM2_RX1_10G_OFFSET CONFIG_SYS_FSL_FM2_RX1_1G_OFFSET CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET CONFIG_SYS_FSL_FMAN_ADDR CONFIG_SYS_FSL_GUTS_ADDR CONFIG_SYS_FSL_IFC_BE CONFIG_SYS_FSL_IFC_LE CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_JR0_ADDR CONFIG_SYS_FSL_JR0_OFFSET CONFIG_SYS_FSL_LS1_CLK_ADDR CONFIG_SYS_FSL_LSCH3_SERDES_ADDR CONFIG_SYS_FSL_MAX_NUM_OF_SEC CONFIG_SYS_FSL_NUM_CC_PLL CONFIG_SYS_FSL_NUM_CC_PLLS CONFIG_SYS_FSL_OCRAM_BASE CONFIG_SYS_FSL_OCRAM_SIZE CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS CONFIG_SYS_FSL_PAMU_OFFSET CONFIG_SYS_FSL_PCIE_COMPAT CONFIG_SYS_FSL_PCI_VER_3_X CONFIG_SYS_FSL_PEX_LUT_BE CONFIG_SYS_FSL_PEX_LUT_LE CONFIG_SYS_FSL_PMIC_I2C_ADDR CONFIG_SYS_FSL_PMU_ADDR CONFIG_SYS_FSL_PMU_CLTBENR CONFIG_SYS_FSL_QMAN_ADDR CONFIG_SYS_FSL_QMAN_OFFSET CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_QSPI_BASE CONFIG_SYS_FSL_QSPI_LE CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RAID_ENGINE_ADDR CONFIG_SYS_FSL_RAID_ENGINE_OFFSET CONFIG_SYS_FSL_RCPM_ADDR CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_RST_ADDR CONFIG_SYS_FSL_SCFG_ADDR CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET CONFIG_SYS_FSL_SCFG_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR CONFIG_SYS_FSL_SEC_ADDR CONFIG_SYS_FSL_SEC_IDX_OFFSET CONFIG_SYS_FSL_SEC_MON_BE CONFIG_SYS_FSL_SEC_MON_LE CONFIG_SYS_FSL_SEC_OFFSET CONFIG_SYS_FSL_SERDES CONFIG_SYS_FSL_SERDES_ADDR CONFIG_SYS_FSL_SFP_BE CONFIG_SYS_FSL_SFP_LE CONFIG_SYS_FSL_SFP_VER_3_0 CONFIG_SYS_FSL_SFP_VER_3_2 CONFIG_SYS_FSL_SFP_VER_3_4 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRDS_3 CONFIG_SYS_FSL_SRDS_4 CONFIG_SYS_FSL_SRDS_NUM_PLLS CONFIG_SYS_FSL_SRIO_ADDR CONFIG_SYS_FSL_SRIO_IB_WIN_NUM CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_SRIO_MAX_PORTS CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM CONFIG_SYS_FSL_SRIO_OB_WIN_NUM CONFIG_SYS_FSL_SRIO_OFFSET CONFIG_SYS_FSL_SRK_LE CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_TIMER_ADDR CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY CONFIG_SYS_FSL_USDHC_NUM CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_FSL_WRIOP1_ADDR CONFIG_SYS_FSL_WRIOP1_MDIO1 CONFIG_SYS_FSL_WRIOP1_MDIO2 CONFIG_SYS_GBL_DATA_OFFSET CONFIG_SYS_GBL_DATA_SIZE CONFIG_SYS_GIC400_ADDR CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR CONFIG_SYS_GP2DIR CONFIG_SYS_GP2ODR CONFIG_SYS_GPIO1_EN CONFIG_SYS_GPIO1_FUNC CONFIG_SYS_GPIO1_LED CONFIG_SYS_GPIO1_OUT CONFIG_SYS_GPIO_EN CONFIG_SYS_GPIO_FUNC CONFIG_SYS_GPIO_OUT CONFIG_SYS_GPR1 CONFIG_SYS_HALT_BEFOR_RAM_JUMP CONFIG_SYS_HMI_BASE CONFIG_SYS_HZ_CLOCK CONFIG_SYS_I2C_BUSES CONFIG_SYS_I2C_DVI_ADDR CONFIG_SYS_I2C_DVI_BUS_NUM CONFIG_SYS_I2C_EEPROM_CCID CONFIG_SYS_I2C_EEPROM_NXID CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS CONFIG_SYS_I2C_EXPANDER_ADDR CONFIG_SYS_I2C_FPGA_ADDR CONFIG_SYS_I2C_G762_ADDR CONFIG_SYS_I2C_IFDR_DIV CONFIG_SYS_I2C_INIT_BOARD CONFIG_SYS_I2C_LDI_ADDR CONFIG_SYS_I2C_MAX_HOPS CONFIG_SYS_I2C_NOPROBES CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_WIDTH CONFIG_SYS_I2C_PCA9557_ADDR CONFIG_SYS_I2C_PINMUX_CLR CONFIG_SYS_I2C_PINMUX_REG CONFIG_SYS_I2C_PINMUX_SET CONFIG_SYS_I2C_RTC_ADDR CONFIG_SYS_I2C_TCA642X_ADDR CONFIG_SYS_I2C_TCA642X_BUS_NUM CONFIG_SYS_ICACHE_INV CONFIG_SYS_IFC_ADDR CONFIG_SYS_IFC_CCR CONFIG_SYS_INIT_DBCR CONFIG_SYS_INIT_L2CSR0 CONFIG_SYS_INIT_L2_ADDR CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_END CONFIG_SYS_INIT_L3_ADDR CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_END CONFIG_SYS_INIT_L3_VADDR CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_CTRL CONFIG_SYS_INIT_RAM_LOCK CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_INTERLAKEN CONFIG_SYS_INT_FLASH_BASE CONFIG_SYS_INT_FLASH_ENABLE CONFIG_SYS_IO_BASE CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_JFFS2_FIRST_SECTOR CONFIG_SYS_JFFS2_NUM_BANKS CONFIG_SYS_KMBEC_FPGA_BASE CONFIG_SYS_KMBEC_FPGA_SIZE CONFIG_SYS_L2_PL310 CONFIG_SYS_L2_SIZE CONFIG_SYS_L3_SIZE CONFIG_SYS_LATCH_ADDR CONFIG_SYS_LBC_ADDR CONFIG_SYS_LBC_CACHE_BASE CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_LBC_LBCR CONFIG_SYS_LBC_LCRR CONFIG_SYS_LBC_LSDMR_COMMON CONFIG_SYS_LBC_LSRT CONFIG_SYS_LBC_MRTPR CONFIG_SYS_LBC_SDRAM_BASE CONFIG_SYS_LBC_SDRAM_BASE_PHYS CONFIG_SYS_LBC_SDRAM_SIZE CONFIG_SYS_LDB_CLOCK CONFIG_SYS_LIME_BASE CONFIG_SYS_LIME_SIZE CONFIG_SYS_LOADS_BAUD_CHANGE CONFIG_SYS_LOW CONFIG_SYS_LOWMEM_BASE CONFIG_SYS_LPAE_SDRAM_BASE CONFIG_SYS_LS1_DDR_BLOCK1_SIZE CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS CONFIG_SYS_LS_MC_DPC_MAX_LENGTH CONFIG_SYS_LS_MC_DPL_MAX_LENGTH CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET CONFIG_SYS_M41T11_BASE_YEAR CONFIG_SYS_MAIN_PWR_ON CONFIG_SYS_MALLOC_SIMPLE CONFIG_SYS_MAMR CONFIG_SYS_MAPLE CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_MASTER_CLOCK CONFIG_SYS_MATRIX_EBI0CSA_VAL CONFIG_SYS_MATRIX_EBICSA_VAL CONFIG_SYS_MAXARGS CONFIG_SYS_MAX_FLASH_SECT CONFIG_SYS_MAX_I2C_BUS CONFIG_SYS_MAX_NAND_CHIPS CONFIG_SYS_MAX_NAND_DEVICE CONFIG_SYS_MBAR CONFIG_SYS_MBAR2 CONFIG_SYS_MCFRRTC_BASE CONFIG_SYS_MCKR CONFIG_SYS_MCKR1_VAL CONFIG_SYS_MCKR2_VAL CONFIG_SYS_MCKR_CSS CONFIG_SYS_MDCNFG_VAL CONFIG_SYS_MDIO1_OFFSET CONFIG_SYS_MDREFR_VAL CONFIG_SYS_MEMAC_LITTLE_ENDIAN CONFIG_SYS_MEMORY_BASE CONFIG_SYS_MEMORY_SIZE CONFIG_SYS_MEM_RESERVE_SECURE CONFIG_SYS_MEM_SIZE CONFIG_SYS_MFD CONFIG_SYS_MHZ CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS CONFIG_SYS_MMC_CD_PIN CONFIG_SYS_MMC_CLK_OD CONFIG_SYS_MMC_MAX_BLK_COUNT CONFIG_SYS_MMC_MAX_DEVICE CONFIG_SYS_MMC_U_BOOT_DST CONFIG_SYS_MMC_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_SIZE CONFIG_SYS_MMC_U_BOOT_START CONFIG_SYS_MONITOR_LEN CONFIG_SYS_MONITOR_SEC CONFIG_SYS_MOR_VAL CONFIG_SYS_MPC83xx_DMA_ADDR CONFIG_SYS_MPC83xx_DMA_OFFSET CONFIG_SYS_MPC83xx_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_OFFSET CONFIG_SYS_MPC83xx_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_OFFSET CONFIG_SYS_MPC85XX_NO_RESETVEC CONFIG_SYS_MPC85xx_DMA CONFIG_SYS_MPC85xx_DMA1_OFFSET CONFIG_SYS_MPC85xx_DMA2_OFFSET CONFIG_SYS_MPC85xx_DMA3_OFFSET CONFIG_SYS_MPC85xx_DMA_ADDR CONFIG_SYS_MPC85xx_DMA_OFFSET CONFIG_SYS_MPC85xx_ECM_ADDR CONFIG_SYS_MPC85xx_ECM_OFFSET CONFIG_SYS_MPC85xx_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_OFFSET CONFIG_SYS_MPC85xx_ESPI_ADDR CONFIG_SYS_MPC85xx_ESPI_OFFSET CONFIG_SYS_MPC85xx_GPIO_ADDR CONFIG_SYS_MPC85xx_GPIO_OFFSET CONFIG_SYS_MPC85xx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_OFFSET CONFIG_SYS_MPC85xx_IFC_OFFSET CONFIG_SYS_MPC85xx_L2_ADDR CONFIG_SYS_MPC85xx_L2_OFFSET CONFIG_SYS_MPC85xx_LBC_OFFSET CONFIG_SYS_MPC85xx_PCI1_OFFSET CONFIG_SYS_MPC85xx_PCI2_OFFSET CONFIG_SYS_MPC85xx_PCIE CONFIG_SYS_MPC85xx_PCIE1_OFFSET CONFIG_SYS_MPC85xx_PCIE2_OFFSET CONFIG_SYS_MPC85xx_PCIE3_OFFSET CONFIG_SYS_MPC85xx_PCIE4_OFFSET CONFIG_SYS_MPC85xx_PCIX2_ADDR CONFIG_SYS_MPC85xx_PCIX2_OFFSET CONFIG_SYS_MPC85xx_PCIX_ADDR CONFIG_SYS_MPC85xx_PCIX_OFFSET CONFIG_SYS_MPC85xx_PIC_OFFSET CONFIG_SYS_MPC85xx_QE_OFFSET CONFIG_SYS_MPC85xx_SATA CONFIG_SYS_MPC85xx_SATA1_ADDR CONFIG_SYS_MPC85xx_SATA1_OFFSET CONFIG_SYS_MPC85xx_SATA2_ADDR CONFIG_SYS_MPC85xx_SATA2_OFFSET CONFIG_SYS_MPC85xx_SCFG CONFIG_SYS_MPC85xx_SCFG_OFFSET CONFIG_SYS_MPC85xx_SERDES1_ADDR CONFIG_SYS_MPC85xx_SERDES1_OFFSET CONFIG_SYS_MPC85xx_SERDES2_ADDR CONFIG_SYS_MPC85xx_SERDES2_OFFSET CONFIG_SYS_MPC85xx_TDM_OFFSET CONFIG_SYS_MPC85xx_USB CONFIG_SYS_MPC85xx_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_OFFSET CONFIG_SYS_MPC85xx_USB1_PHY_ADDR CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET CONFIG_SYS_MPC85xx_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_OFFSET CONFIG_SYS_MPC85xx_USB2_PHY_ADDR CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET CONFIG_SYS_MPC8xxx_DDR2_OFFSET CONFIG_SYS_MPC8xxx_DDR3_OFFSET CONFIG_SYS_MPC8xxx_DDR_OFFSET CONFIG_SYS_MPC8xxx_PIC_ADDR CONFIG_SYS_MRAM_BASE CONFIG_SYS_MRAM_SIZE CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST CONFIG_SYS_NAND_AMASK CONFIG_SYS_NAND_BASE CONFIG_SYS_NAND_BASE2 CONFIG_SYS_NAND_BASE_LIST CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_NAND_CS CONFIG_SYS_NAND_CSOR CONFIG_SYS_NAND_CSPR CONFIG_SYS_NAND_CSPR_EXT CONFIG_SYS_NAND_DATA_BASE CONFIG_SYS_NAND_DBW_8 CONFIG_SYS_NAND_DDR_LAW CONFIG_SYS_NAND_ECCBYTES CONFIG_SYS_NAND_ECCPOS CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_ECCSTEPS CONFIG_SYS_NAND_ECCTOTAL CONFIG_SYS_NAND_ECC_BASE CONFIG_SYS_NAND_ENABLE_PIN CONFIG_SYS_NAND_ENABLE_PIN_SPL CONFIG_SYS_NAND_FTIM0 CONFIG_SYS_NAND_FTIM1 CONFIG_SYS_NAND_FTIM2 CONFIG_SYS_NAND_FTIM3 CONFIG_SYS_NAND_HW_ECC CONFIG_SYS_NAND_HW_ECC_OOBFIRST CONFIG_SYS_NAND_LARGEPAGE CONFIG_SYS_NAND_MASK_ALE CONFIG_SYS_NAND_MASK_CLE CONFIG_SYS_NAND_MAX_ECCPOS CONFIG_SYS_NAND_MAX_OOBFREE CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES CONFIG_SYS_NAND_NO_SUBPAGE_WRITE CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_NAND_PAGE_2K CONFIG_SYS_NAND_PAGE_4K CONFIG_SYS_NAND_READY_PIN CONFIG_SYS_NAND_REGS_BASE CONFIG_SYS_NAND_SIZE CONFIG_SYS_NAND_SPL_KERNEL_OFFS CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_NAND_U_BOOT_RELOC_SP CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NONCACHED_MEMORY CONFIG_SYS_NOR0_CSPR CONFIG_SYS_NOR0_CSPR_EARLY CONFIG_SYS_NOR0_CSPR_EXT CONFIG_SYS_NOR1_CSPR CONFIG_SYS_NOR1_CSPR_EARLY CONFIG_SYS_NOR1_CSPR_EXT CONFIG_SYS_NOR_AMASK CONFIG_SYS_NOR_AMASK_EARLY CONFIG_SYS_NOR_CSOR CONFIG_SYS_NOR_CSPR CONFIG_SYS_NOR_CSPR_EXT CONFIG_SYS_NOR_FTIM0 CONFIG_SYS_NOR_FTIM1 CONFIG_SYS_NOR_FTIM2 CONFIG_SYS_NOR_FTIM3 CONFIG_SYS_NS16550_CLK CONFIG_SYS_NS16550_COM1 CONFIG_SYS_NS16550_COM2 CONFIG_SYS_NS16550_COM3 CONFIG_SYS_NS16550_COM4 CONFIG_SYS_NS16550_COM5 CONFIG_SYS_NS16550_COM6 CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE CONFIG_SYS_NS16550_SERIAL CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_FM1_10GEC CONFIG_SYS_NUM_FM1_DTSEC CONFIG_SYS_NUM_FM2_10GEC CONFIG_SYS_NUM_FM2_DTSEC CONFIG_SYS_NUM_FMAN CONFIG_SYS_NUM_I2C_BUSES CONFIG_SYS_NVRAM_BASE_ADDR CONFIG_SYS_NVRAM_SIZE CONFIG_SYS_OBIR CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_OMAP_ABE_SYSCK CONFIG_SYS_ONENAND_BASE CONFIG_SYS_ONENAND_BLOCK_SIZE CONFIG_SYS_OR_TIMING_MRAM CONFIG_SYS_OSCIN_FREQ CONFIG_SYS_OSPR_OFFSET CONFIG_SYS_PACNT CONFIG_SYS_PADAT CONFIG_SYS_PADDR CONFIG_SYS_PAGE_SIZE CONFIG_SYS_PAMU_ADDR CONFIG_SYS_PASPAR CONFIG_SYS_PAXE_BASE CONFIG_SYS_PAXE_SIZE CONFIG_SYS_PBCNT CONFIG_SYS_PBDAT CONFIG_SYS_PBDDR CONFIG_SYS_PBI_FLASH_BASE CONFIG_SYS_PBI_FLASH_WINDOW CONFIG_SYS_PBSIZE CONFIG_SYS_PCCNT CONFIG_SYS_PCDAT CONFIG_SYS_PCDDR CONFIG_SYS_PCI CONFIG_SYS_PCI1_ADDR CONFIG_SYS_PCI1_IO_BASE CONFIG_SYS_PCI1_IO_BUS CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_SIZE CONFIG_SYS_PCI1_IO_VIRT CONFIG_SYS_PCI1_MEM_BASE CONFIG_SYS_PCI1_MEM_BUS CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_SIZE CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI2_ADDR CONFIG_SYS_PCIE CONFIG_SYS_PCIE1_ADDR CONFIG_SYS_PCIE1_BASE CONFIG_SYS_PCIE1_CFG_BASE CONFIG_SYS_PCIE1_CFG_SIZE CONFIG_SYS_PCIE1_IO_BASE CONFIG_SYS_PCIE1_IO_PHYS CONFIG_SYS_PCIE1_IO_SIZE CONFIG_SYS_PCIE1_IO_VIRT CONFIG_SYS_PCIE1_MEM_BASE CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_SIZE CONFIG_SYS_PCIE1_MEM_VIRT CONFIG_SYS_PCIE1_PHYS_ADDR CONFIG_SYS_PCIE1_PHYS_BASE CONFIG_SYS_PCIE1_VIRT_ADDR CONFIG_SYS_PCIE2_ADDR CONFIG_SYS_PCIE2_BASE CONFIG_SYS_PCIE2_CFG_BASE CONFIG_SYS_PCIE2_CFG_SIZE CONFIG_SYS_PCIE2_IO_BASE CONFIG_SYS_PCIE2_IO_PHYS CONFIG_SYS_PCIE2_IO_SIZE CONFIG_SYS_PCIE2_IO_VIRT CONFIG_SYS_PCIE2_MEM_BASE CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_SIZE CONFIG_SYS_PCIE2_MEM_VIRT CONFIG_SYS_PCIE2_PHYS_ADDR CONFIG_SYS_PCIE2_PHYS_BASE CONFIG_SYS_PCIE2_VIRT_ADDR CONFIG_SYS_PCIE3_ADDR CONFIG_SYS_PCIE3_IO_PHYS CONFIG_SYS_PCIE3_IO_VIRT CONFIG_SYS_PCIE3_MEM_PHYS CONFIG_SYS_PCIE3_MEM_VIRT CONFIG_SYS_PCIE3_PHYS_ADDR CONFIG_SYS_PCIE3_PHYS_SIZE CONFIG_SYS_PCIE4_ADDR CONFIG_SYS_PCIE4_IO_PHYS CONFIG_SYS_PCIE4_IO_VIRT CONFIG_SYS_PCIE4_MEM_BUS CONFIG_SYS_PCIE4_MEM_PHYS CONFIG_SYS_PCIE4_MEM_VIRT CONFIG_SYS_PCIE4_PHYS_ADDR CONFIG_SYS_PCIE_MMAP_SIZE CONFIG_SYS_PCI_IO_BASE CONFIG_SYS_PCI_IO_PHYS CONFIG_SYS_PCI_IO_SIZE CONFIG_SYS_PCI_MAP_END CONFIG_SYS_PCI_MAP_START CONFIG_SYS_PCI_MEM_BASE CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_SIZE CONFIG_SYS_PCI_MMIO_BASE CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_SIZE CONFIG_SYS_PCI_SLV_MEM_BUS CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_PCI_SLV_MEM_SIZE CONFIG_SYS_PDCNT CONFIG_SYS_PEHLPAR CONFIG_SYS_PIOC_PDR_VAL CONFIG_SYS_PIOC_PDR_VAL1 CONFIG_SYS_PIOC_PPUDR_VAL CONFIG_SYS_PIOD_PDR_VAL1 CONFIG_SYS_PIOD_PPUDR_VAL CONFIG_SYS_PJPAR CONFIG_SYS_PL310_BASE CONFIG_SYS_PLLAR_VAL CONFIG_SYS_PLLCR CONFIG_SYS_PLL_BYPASS CONFIG_SYS_PLL_FDR CONFIG_SYS_PLL_ODR CONFIG_SYS_PLL_SETTLING_TIME CONFIG_SYS_PMAN CONFIG_SYS_PMC_BASE CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PME_CLK CONFIG_SYS_POST_MEMORY CONFIG_SYS_POST_MEM_REGIONS CONFIG_SYS_PTV CONFIG_SYS_PUAPAR CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_CENA_SIZE CONFIG_SYS_QMAN_CINH_BASE CONFIG_SYS_QMAN_CINH_SIZE CONFIG_SYS_QMAN_MEM_BASE CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_SIZE CONFIG_SYS_QMAN_NUM_PORTALS CONFIG_SYS_QMAN_SP_CENA_SIZE CONFIG_SYS_QMAN_SP_CINH_SIZE CONFIG_SYS_QMAN_SWP_ISDR_REG CONFIG_SYS_QRIO_BASE CONFIG_SYS_QRIO_BASE_PHYS CONFIG_SYS_RAMBOOT CONFIG_SYS_RCAR_I2C0_BASE CONFIG_SYS_RCAR_I2C1_BASE CONFIG_SYS_RCAR_I2C2_BASE CONFIG_SYS_RCAR_I2C3_BASE CONFIG_SYS_RFD CONFIG_SYS_RGMII1_PHY_ADDR CONFIG_SYS_RGMII2_PHY_ADDR CONFIG_SYS_ROM_BASE CONFIG_SYS_RSTC_RMR_VAL CONFIG_SYS_RTC_BUS_NUM CONFIG_SYS_RTC_CNT CONFIG_SYS_RTC_SETUP CONFIG_SYS_SATA CONFIG_SYS_SATA1 CONFIG_SYS_SATA1_FLAGS CONFIG_SYS_SATA1_OFFSET CONFIG_SYS_SATA2 CONFIG_SYS_SATA2_FLAGS CONFIG_SYS_SATA2_OFFSET CONFIG_SYS_SATA_FAT_BOOT_PARTITION CONFIG_SYS_SBFHDR_DATA_OFFSET CONFIG_SYS_SBFHDR_SIZE CONFIG_SYS_SCCR_SATACM CONFIG_SYS_SCCR_TSEC1CM CONFIG_SYS_SCCR_TSEC2CM CONFIG_SYS_SCCR_USBDRCM CONFIG_SYS_SCR CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 CONFIG_SYS_SDRAM_BASE1 CONFIG_SYS_SDRAM_BASE2 CONFIG_SYS_SDRAM_CFG CONFIG_SYS_SDRAM_CFG1 CONFIG_SYS_SDRAM_CFG2 CONFIG_SYS_SDRAM_CTRL CONFIG_SYS_SDRAM_EMOD CONFIG_SYS_SDRAM_MODE CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 CONFIG_SYS_SDRAM_SIZE_LAW CONFIG_SYS_SDRAM_VAL CONFIG_SYS_SDRAM_VAL1 CONFIG_SYS_SDRAM_VAL10 CONFIG_SYS_SDRAM_VAL11 CONFIG_SYS_SDRAM_VAL12 CONFIG_SYS_SDRAM_VAL2 CONFIG_SYS_SDRAM_VAL3 CONFIG_SYS_SDRAM_VAL4 CONFIG_SYS_SDRAM_VAL5 CONFIG_SYS_SDRAM_VAL6 CONFIG_SYS_SDRAM_VAL7 CONFIG_SYS_SDRAM_VAL8 CONFIG_SYS_SDRAM_VAL9 CONFIG_SYS_SDRC_CR_VAL CONFIG_SYS_SDRC_MDR_VAL CONFIG_SYS_SDRC_MR_VAL CONFIG_SYS_SDRC_MR_VAL1 CONFIG_SYS_SDRC_MR_VAL2 CONFIG_SYS_SDRC_MR_VAL3 CONFIG_SYS_SDRC_MR_VAL4 CONFIG_SYS_SDRC_MR_VAL5 CONFIG_SYS_SDRC_TR_VAL CONFIG_SYS_SDRC_TR_VAL1 CONFIG_SYS_SDRC_TR_VAL2 CONFIG_SYS_SD_VOLTAGE CONFIG_SYS_SEC_MON_ADDR CONFIG_SYS_SEC_MON_OFFSET CONFIG_SYS_SERIAL0 CONFIG_SYS_SERIAL1 CONFIG_SYS_SERIAL2 CONFIG_SYS_SERIAL3 CONFIG_SYS_SFP_ADDR CONFIG_SYS_SFP_OFFSET CONFIG_SYS_SGMII1_PHY_ADDR CONFIG_SYS_SGMII2_PHY_ADDR CONFIG_SYS_SGMII3_PHY_ADDR CONFIG_SYS_SGMII_LINERATE_MHZ CONFIG_SYS_SGMII_RATESCALE CONFIG_SYS_SGMII_REFCLK_MHZ CONFIG_SYS_SH_SDHI0_BASE CONFIG_SYS_SH_SDHI1_BASE CONFIG_SYS_SH_SDHI2_BASE CONFIG_SYS_SH_SDHI3_BASE CONFIG_SYS_SH_SDHI_NR_CHANNEL CONFIG_SYS_SICRH CONFIG_SYS_SICRL CONFIG_SYS_SMC0_CYCLE0_VAL CONFIG_SYS_SMC0_MODE0_VAL CONFIG_SYS_SMC0_PULSE0_VAL CONFIG_SYS_SMC0_SETUP0_VAL CONFIG_SYS_SPD_BUS_NUM CONFIG_SYS_SPI_ARGS_OFFS CONFIG_SYS_SPI_ARGS_SIZE CONFIG_SYS_SPI_BASE CONFIG_SYS_SPI_CLK CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_SYS_SPI_KERNEL_OFFS CONFIG_SYS_SPI_ST_ENABLE_WP_PIN CONFIG_SYS_SPI_U_BOOT_SIZE CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SPL_LEN CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_SPR CONFIG_SYS_SRIO CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_SIZE CONFIG_SYS_SRIO1_MEM_VIRT CONFIG_SYS_SRIO2_MEM_PHYS CONFIG_SYS_SRIO2_MEM_SIZE CONFIG_SYS_SRIO2_MEM_VIRT CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS CONFIG_SYS_SST_SECT CONFIG_SYS_SST_SECTSZ CONFIG_SYS_STACK_SIZE CONFIG_SYS_TBIPA_VALUE CONFIG_SYS_TCLK CONFIG_SYS_TIMERBASE CONFIG_SYS_TIMER_BASE CONFIG_SYS_TIMER_COUNTER CONFIG_SYS_TIMER_COUNTS_DOWN CONFIG_SYS_TIMER_RATE CONFIG_SYS_TMPVIRT CONFIG_SYS_TSEC1_OFFSET CONFIG_SYS_TSEC2_OFFSET CONFIG_SYS_TSEC3_OFFSET CONFIG_SYS_TX_ETH_BUFFER CONFIG_SYS_UART2_ALT3_GPIO CONFIG_SYS_UART_PORT CONFIG_SYS_UBOOT_BASE CONFIG_SYS_UBOOT_START CONFIG_SYS_UEC CONFIG_SYS_UEC2_ETH_TYPE CONFIG_SYS_UEC2_INTERFACE_SPEED CONFIG_SYS_UEC2_INTERFACE_TYPE CONFIG_SYS_UEC2_PHY_ADDR CONFIG_SYS_UEC2_RX_CLK CONFIG_SYS_UEC2_TX_CLK CONFIG_SYS_UEC2_UCC_NUM CONFIG_SYS_ULB_CLK CONFIG_SYS_UNIFY_CACHE CONFIG_SYS_USB_FAT_BOOT_PARTITION CONFIG_SYS_USB_OHCI_BOARD_INIT CONFIG_SYS_USB_OHCI_CPU_INIT CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_REGS_BASE CONFIG_SYS_USB_OHCI_SLOT_NAME CONFIG_SYS_USE_NAND CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT CONFIG_SYS_VCXK_BASE CONFIG_SYS_VCXK_DEFAULT_LINEALIGN CONFIG_SYS_VCXK_DOUBLEBUFFERED CONFIG_SYS_VCXK_ENABLE_DDR CONFIG_SYS_VCXK_ENABLE_PIN CONFIG_SYS_VCXK_ENABLE_PORT CONFIG_SYS_VCXK_INVERT_DDR CONFIG_SYS_VCXK_INVERT_PIN CONFIG_SYS_VCXK_INVERT_PORT CONFIG_SYS_VCXK_REQUEST_DDR CONFIG_SYS_VCXK_REQUEST_PIN CONFIG_SYS_VCXK_REQUEST_PORT CONFIG_SYS_VIDEO_LOGO_MAX_SIZE CONFIG_SYS_VSC7385_BASE CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BR_PRELIM CONFIG_SYS_VSC7385_OR_PRELIM CONFIG_SYS_WATCHDOG_VALUE CONFIG_SYS_WDTC_WDMR_VAL CONFIG_SYS_WRITE_SWAPPED_DATA CONFIG_SYS_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB3_ADDR CONFIG_TCA642X CONFIG_TEGRA_BOARD_STRING CONFIG_TEGRA_CLOCK_SCALING CONFIG_TEGRA_ENABLE_UARTA CONFIG_TEGRA_ENABLE_UARTD CONFIG_TEGRA_GPU CONFIG_TEGRA_LP0 CONFIG_TEGRA_PMU CONFIG_TEGRA_SLINK_CTRLS CONFIG_TEGRA_SPI CONFIG_TEGRA_UARTA_GPU CONFIG_TEGRA_UARTA_SDIO1 CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 CONFIG_TESTPIN_MASK CONFIG_TESTPIN_REG CONFIG_THOR_RESET_OFF CONFIG_THUNDERX CONFIG_TIZEN CONFIG_TMU_TIMER CONFIG_TPL_PAD_TO CONFIG_TPM_TIS_BASE_ADDRESS CONFIG_TPS6586X_POWER CONFIG_TRATS CONFIG_TSEC CONFIG_TSEC1 CONFIG_TSEC1_NAME CONFIG_TSEC2 CONFIG_TSEC2_NAME CONFIG_TSEC3 CONFIG_TSEC3_NAME CONFIG_TSEC4 CONFIG_TSEC4_NAME CONFIG_TSECV2 CONFIG_TSECV2_1 CONFIG_TSEC_TBICR_SETTINGS CONFIG_TWL6030_POWER CONFIG_UBIFS_VOLUME CONFIG_UBI_PART CONFIG_UBI_SIZE CONFIG_UBOOTPATH CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START CONFIG_UEC_ETH CONFIG_UEC_ETH2 CONFIG_USART_BASE CONFIG_USART_ID CONFIG_USBD_HS CONFIG_USBD_MANUFACTURER CONFIG_USBD_PRODUCTID_CDCACM CONFIG_USBD_PRODUCTID_GSERIAL CONFIG_USBD_PRODUCT_NAME CONFIG_USBD_VENDORID CONFIG_USBNET_DEV_ADDR CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL CONFIG_USB_BOOTING CONFIG_USB_DEVICE CONFIG_USB_EHCI_EXYNOS CONFIG_USB_EHCI_TXFIFO_THRESH CONFIG_USB_EXT2_BOOT CONFIG_USB_FAT_BOOT CONFIG_USB_GADGET_AT91 CONFIG_USB_GADGET_DWC2_OTG_PHY CONFIG_USB_ISP1301_I2C_ADDR CONFIG_USB_MAX_CONTROLLER_COUNT CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW CONFIG_USB_TTY CONFIG_USB_XHCI_EXYNOS CONFIG_USE_ONENAND_BOARD_INIT CONFIG_U_BOOT_HDR_SIZE CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM CONFIG_VSC7385_ENET CONFIG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE CONFIG_VSC9953 CONFIG_WATCHDOG_PRESC CONFIG_WATCHDOG_RC CONFIG_WATCHDOG_TIMEOUT CONFIG_X86EMU_RAW_IO CONFIG_X86_MRC_ADDR CONFIG_X86_REFCODE_ADDR CONFIG_X86_REFCODE_RUN_ADDR CONFIG_XTFPGA |